Senior Principal SoC Design Engineer

Arm; Old Toronto; On-site; USD 180,000 - 245,000; Full time

Job summary

An innovative firm seeks a SoC Design Engineer to join their dynamic team. In this role, you will leverage your extensive experience in digital hardware design to create cutting-edge systems optimized for performance and power. Collaborating with talented engineers, you will engage in all stages of the design process, from initial concept through to implementation and testing. This position not only offers the chance to work with advanced technologies but also to mentor junior engineers, fostering a collaborative and growth-oriented environment. If you are passionate about technology and eager to make a significant impact, this opportunity is for you.

Qualifications

• 10+ years of experience in design of complex compute subsystems or SoCs.
• Strong experience in digital hardware design using Verilog HDL.

Responsibilities

• Develop logic for innovative high-performance compute and AI solutions.
• Contribute to design specifications and collaborate with verification teams.

Skills

Verilog HDL

Digital hardware design

Power optimization

Scripting (Perl, Python)

Leadership and mentoring

Education

Bachelor's degree in Computer Science

Master's degree in Electrical/Computer Engineering

Tools

SystemVerilog

UPF

IP-XACT

Job description

Job Overview

Our Solution Engineering division develops SoCs for various application segments, using the latest IP products from Arm and other vendors. We are looking for a creative and hard-working SoC Design Engineer to join the team and help develop these systems. You will contribute to the specification, design and verification of various products. You will join a small team of dedicated engineers in Austin, as well as collaborate with multiple other groups inside of Arm to design our SoC products.

Would you love a wider exposure across multiple IP products? Do you want an opportunity to work globally with various internal teams to deliver systems optimized for performance and power? Then we want to speak with you!

Responsibilities

• As a creative design engineer with a knowledge of subsystems and SoCs you will be part of a team developing logic for our innovative high-performance compute and AI solutions.
• You will work as part of the design team to understand and review the SoC architecture and develop the design specifications which meet leading complex power/performance goals. Your key responsibilities will include crafting design micro-architecture specifications, developing the RTL, fixing bugs, running design checks and contributing to the generation of implementation constraints.
• You will also work closely with the verification team to review test plans and help debug design issues and with the performance/power analysis teams to evaluate and improve SoC performance/power.
• As part of the design team you will contribute to developing and enhancing the design methodologies used by the team.
• You will mentor and support other members of the team to enable the successful completion of project activities.
• You will balance other opportunities such as working with Project Management on plans and schedules.

Required Skills & Experience

In addition to bringing your accomplishment of either Bachelors or Master’s degree in Computer Science or Electrical/Computer Engineering or a similar related field and 10+ years experience working in design of complex compute subsystems or SoCs, you will need:

• Experience in digital hardware design for complex systems using Verilog HDL.
• Experience with power and clock domain crossing and with static design checks like linting, CDC/RDC, X-propagation.
• Exposure to all stages of design: initial concept, specification, implementation, power and performance analysis, power optimization, testing, documentation and support.
• Experience or knowledge in synthesis, timing constraints, power management techniques.
• Experience collaborating with the verification team on design quality closure.
• Experience with Perl, Python or other scripting language.
• Leadership, mentoring or coaching experience.

'Nice to Have' Skills and Experience

• Experience with ARM-based designs and/or ARM System Architectures.
• Experience with SystemVerilog and verification methodologies – UVM/OVM/e.
• Experience with UPF, IP-XACT.
• Experience leading teams or projects.
• Experience developing and integrating subsystems for PCIe, UCIe, DDR/LPDDR/HBM, Ethernet etc.
• Understanding of DFT topics: RTL testability, scan insertion, OCC.

Accommodations at Arm

At Arm, we want our people to Do Great Things. If you need support or an accommodation to Be Your Brilliant Self during the recruitment process, please email [e-mail]. To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation.

Equal Opportunities at Arm

Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Hybrid Working at Arm

Arm’s hybrid approach to working is centred around flexibility, where we split our time between the office and other locations to get our work done. Within that framework, we empower groups and teams to determine their own particular hybrid working pattern, depending on the work and the team’s needs.

Salary Range: $180,922-$244,777 per year

We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.