Senior FPGA Engineer (Hybrid)

Kardium Inc.; Burnaby; Hybrid; CAD 113,000 - 132,000; Full time

Benefits offered by this job

Stock option plan

5% retirement savings contribution

Commitment to diversity, equity, and inclusion

Job summary

Kardium Inc. in Burnaby, BC, is looking for a Senior FPGA Engineer to enhance FPGA functionality for innovative medical devices. This role involves FPGA development, debugging, and collaboration across teams. Candidates should hold a degree in electrical engineering and have 8+ years of relevant experience. Competitive salary from $113,000 to $132,000 CAD, plus stock options and retirement contributions. Kardium promotes a diverse and inclusive workplace.

Qualifications

• Minimum 8+ years of experience in FPGA development and verification.
• Experience with Vivado for FPGA design and Active-HDL for simulation and verification.
• Ability to read electrical schematics.

Responsibilities

• Assist in FPGA design, including implementing and verifying modules.
• Support debugging efforts for FPGA-related issues.
• Document designs, test procedures, and debugging results.

Skills

FPGA development

VHDL

Debugging tools

TCL scripting

Python scripting

Problem-solving skills

Education

Bachelor's degree in electrical engineering or related field

Tools

Vivado

Active-HDL

Logic analyzers

Oscilloscopes

Git

Job description

By joining the Kardium team, you can help make a difference in the lives of millions around the world. We have developed a ground‑breaking medical device for the minimally invasive diagnosis and treatment of the most common heart rhythm disorder, atrial fibrillation. Atrial fibrillation can cause stroke, heart failure, and other heart‑related complications.

Kardium’s product, the Globe® Pulsed Field System, is FDA approved and has begun the commercial launch. This pivotal moment invites a Senior FPGA Engineer to support the next generation of high‑quality medical devices.

This is a hybrid work arrangement located in Burnaby, BC.

What You’ll Be Doing

The Senior FPGA Engineer position focuses on FPGA development and verification activities. You will work as part of a highly collaborative team to support and enhance FPGA functionality.

Responsibilities

• Assist in FPGA design, including implementing and verifying modules.
• Support debugging efforts for FPGA‑related issues, working closely with firmware and hardware teams.
• Write and maintain testbenches to validate FPGA functionality.
• Participate in code reviews, contributing to design improvements and optimization.
• Assist in system integration by collaborating with software, hardware, and verification teams.
• Work with multi‑FPGA systems, including interconnect design and verification.
• Document designs, test procedures, and debugging results to ensure knowledge retention and transfer.

Qualifications

• Bachelor’s degree or higher in electrical engineering, computer engineering, or a related field.
• Minimum 8+ years of experience in FPGA development and verification.
• Experience with Vivado for FPGA design and Active‑HDL for simulation and verification.
• Proficiency in VHDL (primary); Verilog/SystemVerilog is an asset.
• Experience with static timing analysis and closure.
• Understanding of AXI (Lite/Full) memory‑mapped register interfaces.
• Understanding of clock domain crossing (CDC) principles.
• Basic understanding of analog/mixed‑signal design, high‑speed digital design, and signal‑integrity concepts.
• Ability to read electrical schematics.
• Experience with debugging tools such as logic analyzers and oscilloscopes.
• Proficiency in TCL and Python scripting.
• Familiarity with Git‑based version control and code review workflows.
• Strong problem‑solving skills and attention to detail.
• Excellent verbal and written communication skills.
• Strong interpersonal skills with the ability to interface effectively across multiple disciplines and functions at various levels of the organization.

Nice to Have

• Experience with medical device design and quality requirements.
• Experience with Zynq FPGAs and SoCs.
• Experience with the Xilinx UltraScale+ family.
• Experience with linting tools such as Aldec ALINT.
• Experience with Aurora and high‑speed serial links (GTH transceivers).
• Experience with multi‑FPGA AXI interconnect design.
• Experience with Vivado IP Integrator and TCL‑based block design.
• Experience with ADC/DAC SPI interfacing.

Other Attributes

• An exceptional level of technical expertise.
• Proficiency with test and measurement equipment.
• A strong drive to succeed with a track record of being highly productive.
• Excellent problem‑solving skills and attention to detail.
• Ability to deal with changing priorities and requirements.
• Ability to execute tasks with minimal instruction and guidance.
• Ability to rapidly understand new concepts and acquire new skills.

Compensation

• $113,000 – $132,000 (CAD annually)

In addition to base salary, you will participate in Kardium’s stock option plan and receive a 5% retirement savings contribution.

Benefits & Inclusion

Kardium is committed to diversity, equity, and inclusion. We encourage applications from all qualified candidates and provide accommodations for the recruitment process as needed.