Senior Engineer - Software

Microchip Technology Inc.

Toronto

On-site

CAD 90,000 - 140,000

Full time

14 days+
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Job summary

Microchip Technology Inc. in Toronto is seeking a Software Engineer to join the FPGA software team. You will work on the High-Level Synthesis (HLS) group, building compiler components that transform C/C++ descriptions into FPGA implementations using LLVM/MLIR.

The role emphasizes compiler development with opportunities to contribute to SoC design and verification workflows. Candidates should have strong C/C++ skills and 5+ years of software experience, plus hands-on LLVM/MLIR experience, and a

Qualifications

  • BS/MS/PhD in CS/EE/CE or related field.
  • 5+ years of software engineering experience.
  • Excellent C/C++ programming skills.
  • At least 2 years of experience with LLVM/MLIR.
  • Solid understanding of algorithms and data structures.
  • Strong background in digital design principles.

Responsibilities

  • Develop, verify, and maintain advanced analysis and transformation passes for the HLS compiler.
  • Optimize HLS-generated hardware architectures for power efficiency, performance, and area.
  • Analyze complex customer applications to identify performance and area improvements and to implement new HLS features as needed.

Skills

C/C++ programming
LLVM/MLIR
Algorithms & data structures
Digital design principles
Software engineering experience

Education

BS/MS/PhD in CS/EE/CE or related field

Tools

Git
Linux/Windows environments

Job description

Job Description

Microchip’s FPGA software engineering team develops advanced Electronic Design Automation (EDA) software. As a Software Engineer you will work on the High‑Level Synthesis (HLS) group, building compiler components that transform C/C++ descriptions into efficient FPGA implementations using LLVM/MLIR. The role focuses on compiler development, with opportunities to contribute to SoC design and verification workflows. The team is located at the Microchip office, 67 Yonge Street, Toronto.

Responsibilities
  • Develop, verify, and maintain advanced analysis and transformation passes for the HLS compiler.
  • Optimize HLS‑generated hardware architectures for power efficiency, performance, and area.
  • Analyze complex customer applications to identify performance and area improvements and to implement new HLS features as needed.
Requirements / Qualifications
Minimum Qualifications
  • BS, MS, or PhD in Computer Science, Electrical Engineering, Computer Engineering, or a related field.
  • 5+ years of software engineering experience.
  • Excellent C/C++ programming skills.
  • At least 2 years of experience with LLVM/MLIR.
  • Solid understanding of algorithms and data structures.
  • Strong background in digital design principles.
Preferred Qualifications
  • Experience with MLIR.
  • Hands‑on FPGA experience.
  • Familiarity with HLS tools.
  • Proficiency with Git.
  • Experience with scripting languages such as Python, Bash, or TCL.
  • Experience with large‑scale software projects in Linux and Windows environments.
Travel Time

0% – 25%

Pay Range / Benefits

The annual base salary range is $90,000 – $140,000. Compensation may vary based on location, skills, and experience. The package includes base pay, restricted stock units, quarterly bonuses, health benefits, a retirement savings plan, and an industry‑leading IESPP program.

Accommodation

In accordance with applicable laws, accommodation will be provided at all stages of the hiring process. Please contact the hiring team if you require assistance.

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