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An established industry player is seeking a Senior Design Verification Engineer to join their innovative R&D team. This role involves architecting and verifying cutting-edge Ethernet and networking IP for next-generation SoCs, impacting various markets such as automotive and industrial. You will leverage over a decade of experience in IP and SoC products, utilizing your expertise in System Verilog and UVM Verification. Collaborate with a dynamic team to ensure high-quality deliverables while driving continuous improvement in design methodologies. This is an exciting opportunity to contribute to groundbreaking technology that drives billions in revenue.
Join a highly experienced R&D team dedicated to developing Intellectual Property (IP) for advanced microcontrollers and microprocessors. This team focuses on creating a networking switch and network controller IP core (NETC) that supports the latest TSN standards, forming the networking foundation for NXP's latest microcontrollers, processors, and switches. The IP developed by this team underpins a product portfolio generating billions of USD in annual revenue. The chips you help develop are likely found in the car you drive, the smart devices in your home, and the factories producing the goods you use.
We are part of Advanced Chip Engineering (ACE), a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products. Our expertise spans hardware engineering, including architecture, IP, and full SoC design.
Job Description
We are seeking a highly motivated Senior Design Verification Engineer with a relentless drive to excel and make a significant impact. Our team offers innovative thinking, engineering expertise, and sustained market leadership in embedded processing. By joining us, you will work with the advanced platforms that NXP delivers to major players in the automotive, industrial, edge, and telecommunication markets, featuring multiple processing cores and high-performance networking accelerators integrated on the same silicon chip.
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