Principal Design Engineer

Cadence Design Systems; Toronto; On-site; CAD 125,000 - 150,000; Full time

Job summary

An established industry player seeks a Principal Design Engineer to join their innovative team in Toronto. This role focuses on High Speed Serdes, requiring a strong background in digital design and collaboration with technical staff. You will be involved in defining digital microarchitecture, implementing designs in FPGAs or ICs, and ensuring compliance with wireline standards. Join a company recognized for its empowering culture and commitment to solving complex technical challenges. This is an opportunity to make a meaningful impact in the technology sector and be part of a diverse and inclusive environment.

Qualifications

• 5+ years of digital design experience in SerDes and digital architecture.
• Hands-on experience with FPGAs or ICs is essential.

Responsibilities

• Define and document digital microarchitecture and RTL logic design.
• Collaborate on project development with analog and digital teams.

Skills

Digital design experience

RTL logic design

Digital microarchitecture

Static timing analysis

Understanding of wireline standards

DSP and algorithms knowledge

Education

Master’s degree in Electrical Engineering

Job description

Principal Design Engineer

Apply locations: TORONTO

Time Type: Full time

Posted on: Posted 3 Days Ago

Job Requisition ID: R49005

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This team is focused on High Speed Serdes. The ideal candidate will have at least 5 plus years of actual work experience in SerDes as well as a thorough understanding of the end-to-end digital design flow to accurately and efficiently collaborate with all members of the technical staff, both analog and digital, regarding overall project development progress and status. This includes but is not limited to:

• Digital microarchitecture definition and documentation
• RTL logic design, debug and functional verification
• Understanding of digital architecture trade-offs for power, performance, and area
• Understanding of proper handling of multiple asynchronous clock domains and their crossings
• Understanding of Lint checks, UPF checks and proper resolution of errors
• Understanding synthesis timing constraints, static timing analysis and constraint development
• Understanding of fundamental physical design flows and stages
• Understanding of wireline standards and collaborating with standards experts to relate standard requirements to logic specifications
• Experience on silicon bring-up and testing of wireline IP
• Strong background in DSP and algorithms is a plus

Requested Skill Set

• Master’s degree or higher in Electrical Engineering
• Minimum 5 years of digital design work experience
• Hands-on experience in implementing and demonstrating digital designs in FPGAs or ICs

We’re doing work that matters. Help us solve what others can’t.

We welcome applications from candidates with disabilities and in equity seeking groups. If you have accessibility needs during the application and interview process, we encourage you to make your needs known.

Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers to create revolutionary products and experiences.

Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.

Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.