Principal ASIC Design Engineer – Processor Sub-Systems

BTA Design Services; Ottawa; On-site; CAD 100,000 - 160,000; Full time

Job summary

Join a rapidly growing design services company in Ottawa, where innovation meets collaboration. This role offers the chance to work on cutting-edge ASIC development projects, translating high-level requirements into detailed specifications. You'll design complex RTL logic, engage with diverse teams, and provide essential technical support to clients. The company values work/life balance, fostering an environment where your contributions are recognized and appreciated. If you are passionate about technology and eager to tackle challenging projects, this opportunity is perfect for you.

Qualifications

• 15+ years of experience in ASIC development and RTL logic design.
• Strong understanding of complex asynchronous clock boundaries.

Responsibilities

• Design and implement complex RTL logic and perform ASIC synthesis.
• Provide technical support and lead customers through technical issues.

Skills

Verilog

System Verilog

ASIC development

RTL logic design

Troubleshooting

Technical support

Micro-architecture design

Education

Undergraduate degree in Electrical Engineering

Tools

Synthesis tools

Timing analysis tools

Simulation tools

Job description

We’re hiring! Come and join one of the fastest growing design services companies in Ottawa. Be part of a company that offers interesting work in challenging, stimulating technical environments with companies that lead the world in technology and innovation.

We recognize that our strength is our people, so at BTA Design Services, we foster an environment where everyone on the team is appreciated, trusted and engaged. We also recognize that work / life balance is essential, so we strive to provide our employees with opportunities that challenge and engage them, but allow them to enjoy family, friends and life outside of work.

Key Responsibilities

1. Understand high-level requirements and translate them into detailed specifications.
2. Micro-architecture of ASIC blocks and sub-systems.
3. Design and implement complex RTL logic (mainly Verilog or System Verilog), run block-level simulation, ASIC synthesis, timing closure.
4. Interface with the verification team, design team, hardware team and support team.
5. Perform lab bring-up, product integration and support.
6. Provide technical support to customers and lead them through complex technical issues.

Requirements

1. Minimum of an undergraduate degree in EE or equivalent skills/experience.
2. A minimum of 15+ years of relevant experience in progressive roles.
3. Experience with modern day ASIC development including complex RTL logic design, synthesis, STA, lint, LEC, and understanding of PnR.
4. Experience with complex asynchronous clock boundaries & high-speed serial interfaces.
5. Experience in a lab environment, troubleshooting issues up to the system level.
6. Experience or knowledge in the following required: ARM A** Application Processor Sub-Systems, Processor Fabric Interfaces (ARM preferred, coherent and non-coherent), Caches, Non-Volatile Memory.
7. Experience or knowledge in the following highly desirable: Networking Switch/Router Datapaths, Packet Processing, OTN, Ethernet.
8. Experience with industry standard interfaces e.g. 10/25/40/100Gb Ethernet and OTN, PCIe, SPI, I2C, USB, AXI, AHB, AMBA, GPIO, SRIO, DDR/SDRAM/DMA, NV Memories.
9. Test verification and scripting experience is a plus.
10. Track record as a self-starter, a team player and a leader.