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A leading company in digital transformation is searching for a PCB Layout Developer to join their innovative team. This role involves managing PCB layout projects, collaborating closely with engineers, and applying design constraints effectively. The candidate will utilize Cadence tools to optimize design performance while ensuring compliance with high-speed and EMI/EMC standards.
ELITS Canada Inc. is a subsidiary of Accelerate at Iver. Our parent company Iver has 1,700 employees today and is growing and now we are looking for new employees who want to join our journey. As part of Accelerate at Iver, you are at the absolute forefront of technology and work on exciting digitization and transformation projects with market-leading customers. We are passionate about realizing digital opportunities in the cloud. Together with our customers, we close the gap between aspiration and successful implementation. Communication is an essential part of the work since we work closely with our customers. With ELITS you will become a part of a great team that always responds to the customer with humility, and at the same time is very proud of what we deliver.
ELITS is now looking for an experienced PCB Layout Developer to join our dynamic team.
Key Responsibilities:
• Printed Circuit Board (PCB) Layout Development: Lead and execute PCB layout activities for high-speed, multi-layer digital and mixed-signal boards.
• Constraint Management: Apply and manage layout constraints using Cadence tools, especially Allegro Constraint Manager (ACM), to ensure signal integrity, power integrity, and design compliance.
• Schematic Review and Validation: Collaborate with digital designers to review and validate front-end constraints and schematics.
• Design Optimization: Optimize component placement and routing for performance, thermal, and mechanical considerations.
• Documentation: Generate and maintain layout documentation, including Gerber files, assembly drawings, and fabrication outputs.
• Quality Assurance: Conduct Design Rule Check (DRC) and Electrical Rule Check (ERC) checks, and participate in design reviews.
• Cross-Functional Collaboration: Interface with cross-functional teams to align layout with system-level requirements and timelines.
Qualifications:
• Education: Diploma or degree in Electrical Engineering, Electronics Technology, or a related field.
• Experience: Five or more years of experience in PCB layout design, preferably in telecom or embedded systems.
Technical Skills:
• Proficiency in Cadence layout tools, especially Allegro and ACM (Allegro Constraint Manager).
• Strong understanding of high-speed design principles, impedance control, and Electromagnetic Interference/Electromagnetic Compatibility (EMI/EMC) best practices.
• Experience reviewing and applying front-end design constraints.
• Solid knowledge of PCB materials and stack-up design for performance and manufacturability.
• Familiarity with Institute for Printed Circuits (IPC) standards and PCB fabrication processes.
Required Skills:
• Experience with Double Data Rate (DDRx) memory interfaces, Serializer/Deserializer (SerDes) technology, and power distribution networks.
• Deep understanding of signal integrity (SI) and power integrity (PI) complexities, crucial for early layout design, particularly in routing and placement planning. This knowledge ensures that potential issues are addressed proactively, leading to more efficient and reliable designs.
• Ability to manage multiple layout projects and meet tight deadlines.
• Strong communication and documentation skills.
Qualities:
Are you a social, flexible, and structured person with a great interest in information technology? Do you find development, constructing, and use of the latest technologies challenging? In that case – send your application to us today!
This position is open to Canadian residents (persons with work permit in Canada).
ELITS - Accelerate at Iver