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Kepler Communications in Toronto, Canada is seeking an FPGA Digital Designer Engineer Intern to contribute to the design and verification of satellite RTL code for real-time space systems. You’ll work with a small, experienced team on challenging hardware projects that push the boundaries of on‑orbit technology.
This internship emphasizes hands-on learning, mentorship, and collaboration in a fast-paced environment.
At Kepler Communications, we’re not just imagining the future of on-demand space connectivity – we’re leading it! Our mission is to provide real-time on-orbit connectivity for critical missions, enabling a new era of data-driven intelligence and innovation. With 33 satellites launched to date, Kepler operates the first commercial optical data relay constellation, enabling real-time, continuous space communications while supporting advanced on-orbit compute and hosted payload capabilities. Industry-leading technology is only part of the story. What sets Kepler apart is our team: bold thinkers, skilled builders, and passionate problem-solvers who thrive on pushing the boundaries of what’s possible in space. We believe great ideas come from diverse perspectives, and we’re committed to creating an environment where you can grow, lead, and make a global impact. If you’re ready to reach higher, move faster, and do work that shapes the future space economy – this is your launchpad. Come build the future with Kepler!
We invest heavily to deliver the best products to our customers, and so we’re on the hunt for a top-tier FPGA Digital Designer Engineer Intern. The RTL code you write will contribute to our new generation of satellites and earth