FPGA DeveloperFPGA Design Engineer (35196)

Myticas Consulting; Ottawa; On-site; CAD 90,000 - 130,000; Full time

Job summary

Myticas Consulting is seeking an FPGA Developer for Datapath/RU FPGA design in Ottawa. You will work on DSP-intensive, FPGA-based solutions for 4G/5G radio units, with a focus on high-speed interfaces and verification.

Minimum 1–5 years of FPGA/DSP background required; strong MATLAB/Simulink and SystemVerilog skills are essential. Onsite work is expected at least 3 days per week in the Ottawa area.

Qualifications

• Bachelor's degree in EE or related field.
• 1–5 years FPGA/DSP experience.
• Hands-on MATLAB/Simulink experience.
• Experience with high-speed interfaces (Ethernet, PCIe, JESD204B/C) and FPGA verification (UVM).

Skills

DSP fundamentals

MATLAB/Simulink

SystemVerilog/RTL

FPGA architecture

High-speed interfaces (Ethernet, PCIe,

FPGA verification

Altera Quartus

HWSW integration

Education

Bachelor's degree in Electrical Engineering or related field

Tools

Quartus II

Job description

FPGA Developer / FPGA Design Engineer (4G/5G Radio – Datapath / RU FPGA Design)

• FPGA Design Engineer with strong Datapath-side Radio Unit (RU) FPGA development experience.


• Hands-on DSP (Digital Signal Processing) expertise including FFT, Beamforming, and Digital Filter implementation.


• Strong MATLAB / Simulink experience (near‑mandatory requirement).


• SystemVerilog and RTL design experience for complex FPGA-based systems.


• Experience developing FPGA IP and architectures for 4G/5G Radio Units.


• Knowledge of AXI and Ethernet protocols; highly valued by the hiring manager.


• Experience with FPGA development tools including Altera Quartus and MATLAB/Simulink.


• Exposure to model‑based design methodologies and FPGA implementation workflows.


• Understanding of wireless communications, 4G/5G radio architecture, O‑RAN, LTE, eCPRI, CPRI, and PTP protocols is desirable but not mandatory.


• Experience optimizing FPGA resource utilization, timing closure, and high‑performance datapath processing.


• Knowledge of high‑speed interfaces such as Ethernet, PCIe, JESD204B/C, AXI, and SERDES technologies.


• Experience with FPGA verification, simulation, validation, UVM, and hardware/software integration.


• CANDIDATES with 1–5 years of experience are encouraged if they possess strong FPGA + DSP fundamentals and high learning potential.


• Manager values adaptability, coachability, learning agility, and openness toward AI‑assisted FPGA design methodologies.


• Must be willing to work onsite a minimum of 3 days per week in the Ottawa area; commuting candidates are acceptable.