Engineer - Customer Layout / Testchip Implementation

GlobalFoundries; Alberta; On-site; CAD 70,000 - 90,000; Full time

Job summary

A leading semiconductor company in Canada, Alberta, is seeking an experienced engineer for Custom layout design and automation. You will lead a sub-team for advanced test chip development and provide layout design for Memory and Analog macros. The ideal candidate holds a relevant degree and has experience in semiconductor physics. This role offers a collaborative work environment with emphasis on innovation and inclusivity.

Benefits

Inclusive workplace culture

Qualifications

• Experience in wafer fabrication or IC Mask design environment preferred.
• Knowledge of Semiconductor Physics, CMOS Device essential.
• Preference for 1-3 years of relevant experience.

Responsibilities

• Lead sub-team in full-scale test chip development from plan to tape-out.
• Provide custom layout design for Memory, I/O Cell, and Analog Macro.
• Develop and maintain EDA codes for automation.

Skills

Good interpersonal skills

Resourceful

Programming skills

Circuit Design background

Education

Bachelor's/Master's degree in Electrical/Electronics Engineering, Computer Science, Physics or equivalent

Job description

Overview

GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.

Introduction:

In this role you are responsible for Custom layout design, automation and layout optimization to support

• Process Characterization/Qualification Test Chip
• Memory (SRAM/NVM), I/O Cell, Analog Macro Layout Design

Your Job

Work with R&D and Fab Process Integration & Module teams to help define advanced test chip for new technology development.

Be able to lead a sub-team to complete a full-scale test chip development, from plan to tape-out.

Provide custom layout design for Memory (SRAM/NVM), I/O Cell, and Analog Macro Layout Design

To develop new/sophisticated or to maintain existing EDA codes for automation.

To ensure successful accomplishment of projects.

For senior engineer position: Understand test structures / macro/ testchip ; be able to provide technical support/guidance to other engineers.

Required Qualifications

Bachelor's/Master's degree in Electrical, Electronics Engineering, Computer Science, Physics or equivalent.

Bachelor's/Master's degree holders. Experience in wafer fabrication or IC Mask design environment is preferred (but not compulsory)

Semiconductor Physics, CMOS Device knowledge is essential

Programming skills and circuit Design background is a plus.

Preference: Engineer with 1-3 years of relevant experience

Other Essential Attributes:

Good interpersonal skill, tactful, resourceful, possess initiative

Possess good working attitude, well organized and work well within a team environment

Motivated and independent

GlobalFoundries is an equal opportunity employer, cultivating a diverse and inclusive workforce. We believe having a multicultural workplace enhances productivity, efficiency and innovation whilst our employees feel truly respected, valued and heard.
As an affirmative employer, all qualified applicants are considered for employment regardless of age, ethnicity, marital status, citizenship, race, religion, political affiliation, gender, sexual orientation and medical and/or physical abilities.
All offers of employment with GlobalFoundries are conditioned upon the successful completion of background checks, medical screenings as applicable and subject to the respective local laws and regulations.

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Note: This description includes essential job functions and required qualifications. It does not guarantee employment and is subject to change.