Distinguished System Architect - xPU

Huawei Canada; Markham; On-site; CAD 125,000 - 150,000; Full time

Job summary

An established industry player is seeking a Distinguished System Architect to lead architectural innovations in AI and data center workloads. This role involves defining next-generation xPU architectures, optimizing compute and networking solutions, and collaborating with global R&D teams to align with semiconductor trends. The ideal candidate will have extensive experience in high-performance computing and a strong background in ISA design and heterogeneous computing. Join a forward-thinking team that is at the forefront of semiconductor technology and make a significant impact in shaping the future of smart devices and mobility solutions.

Qualifications

• 15+ years of experience in high-performance computing and xPU system design.
• Deep expertise in ISA design and AI accelerators.

Responsibilities

• Define next-generation xPU system architectures for AI and data center workloads.
• Design and optimize compute and networking acceleration architectures.

Skills

High-performance computing

xPU system design

Networking chip architecture

ISA design (Arm)

Vector processing

AI accelerators

Memory systems

Heterogeneous computing

Software-hardware co-design

Communication skills

Education

Ph.D. in Computer Architecture

Master’s in Electrical Engineering

Job description

Huawei Canada has an immediate permanent opening for a Distinguished System Architect.

About the team:

Initially founded in 1991 as Huawei's ASIC Design Center, the IC Lab is a leading global fabless semiconductor lab. This lab delivers trusted, cutting-edge semiconductor products and services for smart devices, contributing to smart home and mobility solutions. The local team in Canada specializes in semiconductors, and chipset solutions.

About the job:

• Architectural Leadership: Define next-generation xPU system architectures for AI and data center workloads, balancing performance, power, and scalability. Develop strategies for heterogeneous computing, including AI acceleration, networking, and cloud applications.

• System Optimization & Productization: Design and optimize compute and networking acceleration architectures, including in-network computing, AI accelerators, and software-defined hardware solutions. Define memory hierarchy, cache coherence strategies, and interconnect topologies for efficient scaling.

• Cross-Team Collaboration: Work closely with global R&D teams to align architectural roadmaps with industry trends in semiconductor, AI, and networking. Lead discussions with headquarters and external partners to advocate for architectural vision.

• Industry Engagement & Thought Leadership: Publish research in top-tier conferences (e.g., ISCA, Hot Chips, DAC, NeurIPS) and contribute to patents and IP strategy. Collaborate with academia and industry groups to influence AI and semiconductor technology trends.

About the ideal candidate:

• Ph.D. or Master’s in Computer Architecture, Electrical Engineering, or a related field.

• 15+ years of experience in high-performance computing, xPU system design, or networking chip architecture.

• Deep expertise in ISA design (Arm), vector processing, AI accelerators, and memory systems.

• Proven experience in heterogeneous computing, HPC, and next-gen networking (RoCE, RDMA, InfiniBand, SmartNICs).

• Strong background in software-hardware co-design, including firmware, compilers, and runtime optimizations.

• Excellent communication skills, with experience engaging executives and global R&D teams.