CPU Verification Engineer

NUVACORE; Markham; On-site; CAD 90,000 - 130,000; Full time

Job summary

NUVACORE is building a high-performance, low-power CPU and seeks Verification Engineers from Senior to Principal levels in Markham, Ontario. You will design verification plans, build robust environments, and develop tests in assembly, C, and RIS to validate RTL against models.

You will collaborate with architecture and RTL teams, drive coverage, and sign off on verification for silicon bring-up with FPGA and emulation support.

Qualifications

• Degree in Electrical/Computer Engineering, Computer Science, or equivalent practical experience.
• 4+ years of design-verification experience (Senior) or 15+ years (Principal) in CPU or complex digital design.
• Strong knowledge of CPU micro-architecture (pipelining, out-of-order execution, branch prediction).
• Hands-on functional verification: test plans, testbenches, checkers, transactors, coverage.
• Proficiency in C/C++ and/or SystemVerilog, plus Python (Perl a plus).
• Experience writing and debugging tests in assembly for CPU verification.

Responsibilities

• Plan and drive the verification scope, strategy, and test plans for the CPU at unit/top levels.
• Build, maintain, and scale verification environments with stimulus generators, checkers, transactors, and coverage.
• Develop complex tests in assembly, C, or RIS to expose corner cases like speculation and retirement ordering.
• Partner with architects to compare RTL against performance models and optimize throughput and branch prediction.
• Define coverage space and write functional monitors to prove test plan completeness.
• Collaborate with architecture and RTL teams to root-cause failures and support emulation, FPGA, and silicon bring-up.

Skills

C/C++

SystemVerilog

Python

Testbenches

Coverage

Micro-architecture

Education

Electrical/Computer Engineering or Computer Science degree

Tools

RIS

Job description

Nuvacore is building a ground-up high performance, low-power CPU for next-generation compute workloads. We are seeking Verification Engineers at multiple levels — from Senior Engineer to Principal level — to help prove the correctness of the Nuvacore CPU. As part of the design verification (DV) team, you will help verify by building the test plans, environments, and checkers that find deep bugs in the pipeline long before silicon, working shoulder-to-shoulder with architecture and RTL design.

THE ROLE

• Plan & Strategy: Drive the verification scope, strategy, and test plans for the CPU at unit and/or top level of the CPU design.
• Environment Setup: Build, maintain, and scale robust verification environments — stimulus generators, checkers, transactors, and coverage — that exercise the pipeline end to end.
• Test & Debug: Generate complex directed and random tests in assembly, C, or random instruction sequences (RIS) to expose corner cases such as speculation, hazards, flushes, and retirement ordering.
• Performance Verification: Partner with architects to correlate RTL against performance models, hunting throughput, stall, and branch-prediction-accuracy issues.
• Coverage Closure: Define the coverage space, write functional coverage monitors, and analyze metrics to prove the test plan is complete.
• Cross-functional Collaboration: Partner with architecture and RTL teams to root-cause failures, drive design fixes, and support emulation, FPGA, and silicon bring-up.

Requirements — Must Have

• Degree in Electrical/Computer Engineering, Computer Science, or equivalent practical experience.
• 15+ years (Principal) or 4+ years (Senior Engineer) of design-verification experience, ideally on a CPU or complex digital design.
• Strong knowledge of CPU micro-architecture and digital logic — pipelines, out-of-order execution, and branch prediction.
• Hands-on functional verification: test plans, testbenches, checkers, transactors, and coverage.
• Proficiency in C/C++ and/or SystemVerilog, plus a scripting language (Python; Perl a plus).
• Experience writing and debugging tests in assembly for CPU verification.

Requirements — Nice To Have

• Experience on one or more of Front-end / execution-unit verification, load/store cache verification, SoC/System verification, Debug/Power mgmt verification.
• Random instruction sequence (RIS) stimulus generation.
• Constrained-random verification and coverage-driven closure.
• Assertions and formal verification.
• Emulation/FPGA and silicon bring-up and debug (waveforms, trace).
• Driving a verification problem end-to-end to sign-off.

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.