Compute Subsystem Verification Engineer (Senior Engineer)

Qualcomm; Markham; On-site; CAD 80,000 - 110,000; Full time

Job summary

An innovative firm is seeking a creative Compute Subsystem Verification Engineer to tackle challenges in developing cutting-edge multimedia and compute solutions. This role involves collaborating with design teams to create verification strategies, utilizing advanced techniques in UVM and System Verilog. You will be integral in ensuring the integrity of next-generation mobile System-on-Chips (SoCs) through rigorous testing and debugging. If you are passionate about pushing the boundaries of technology and want to make a significant impact, this opportunity is perfect for you.

Qualifications

• 2+ years of ASIC design or verification experience.
• Strong UVM and System Verilog skills required.

Responsibilities

• Develop verification strategies and test plans for multimedia subsystems.
• Create verification environments using UVM/System Verilog.

Skills

UVM

System Verilog

Digital design concepts

Bus protocols (AHB/AXI)

Perl scripting

Python scripting

Test plan development

Team collaboration

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Science, Engineering, or related field

PhD in Science, Engineering, or related field

Tools

UVM testbenches

Debugging tools

Job description

Join to apply for the Compute Subsystem Verification Engineer (Senior Engineer) role at Qualcomm

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Join to apply for the Compute Subsystem Verification Engineer (Senior Engineer) role at Qualcomm

Company:

Qualcomm Canada ULC

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

Are you a creative engineer looking for challenges to develop technologies that improve people’s everyday life? We are searching for an ASIC verification engineer interested in developing world-class multimedia and compute solutions to build next generation mobile System-on-Chips (SoCs).

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, or related work experience.
• OR Master's degree in Science, Engineering, or related field and 1+ years of ASIC design, verification, or related work experience.
• OR PhD in Science, Engineering, or related field.

Responsibilities:

• Work closely with design, architects, and verification leads to develop the multimedia and compute subsystem integration verification strategy and test plan
• Create verification environment using UVM/System Verilog
• Resolve architecture, design, or verification problems by applying sound ASIC engineering practices with minimal supervision
• Write tests and regressions to identify bugs and assist junior team members
• Develop C reference model
• Interpret performance check results and identify issues
• Communicate deviations from the plan to the lead
• Perform RTL code coverage, assertion coverage, functional coverage, and gate level simulations
• Employ power-aware verification techniques
• Identify opportunities for productivity improvements and adopt new methodologies

Required Competencies:

• Legal ability to work in Canada
• Understanding of Digital design concepts
• Strong UVM, System Verilog skills
• Knowledge of Bus protocols like AHB/AXI
• Perl, Python scripting experience
• Ability to develop thorough test plans based on specs and standards
• Experience with monitors, scoreboards, sequencers, and UVM testbenches
• Comfort with build checks, navigating test benches, analyzing coverage, and debugging
• Strong communication skills and team collaboration

Minimum Experience:

• 3+ years in ASIC design, verification, or related field

Qualcomm is an equal opportunity employer. For accommodations, contact [e-mail]. Qualcomm expects employees to adhere to all applicable policies regarding confidentiality and security.