ASIC Mix-Signal Test Development Engineer (Automated Test Equipment (ATE))

Ciena; Ottawa; On-site; USD 100,000 - 162,000; Full time

Job summary

An established industry player is seeking a passionate ASIC Mix-Signal Test Development Engineer to join their innovative team. In this exciting role, you'll design and implement cutting-edge production test solutions for high-speed ASICs, focusing on both analog and digital circuits. Collaborate with diverse design teams, troubleshoot test issues, and automate workflows to enhance testing efficiency. This full-time position offers a competitive salary and comprehensive benefits, making it a fantastic opportunity for those eager to make a significant impact in the telecommunications sector.

Benefits

Health Plans

401(K)

Employee Stock Purchase

Paid Leave

Qualifications

• Experience with DAC/ADC/PLL testing techniques for high-speed ASICs.
• Practical scripting experience for automation.

Responsibilities

• Creating verification plans with design teams.
• Developing test cases and scripts for package and wafer testing.
• Optimizing test processes for yield and efficiency.

Skills

SystemVerilog

UVM

SVA

C/C++

Debugging

Communication Skills

Multitasking

Education

Bachelor’s degree in Electrical Engineering

Bachelor’s degree in Computer Engineering

Tools

Advantest V93000

Jira

GIT

Python

Make

Bash

Job description

ASIC Mix-Signal Test Development Engineer (Automated Test Equipment (ATE))

Join to apply for the ASIC Mix-Signal Test Development Engineer (Automated Test Equipment (ATE)) role at Ciena.

About the Role: As a Test Development Engineer at Ciena, you will design and implement production test solutions for ASICs, focusing on analog and digital circuits for the Wavelogic product line. You will develop and maintain digital test environments, collaborate with various design teams, and troubleshoot test issues.

Responsibilities include:

• Creating verification plans with design teams.
• Developing test cases and scripts for package and wafer testing.
• Debugging and troubleshooting test failures.
• Optimizing test processes for yield and efficiency.
• Validating test cases with test houses and on ATE platforms.
• Automating workflows and contributing to test yield improvements.
• Analyzing test data and developing automation frameworks.
• Participating in design reviews and staying updated on testing technologies.

Minimum Qualifications:

• Bachelor’s degree in Electrical or Computer Engineering.
• Experience with SystemVerilog, UVM, SVA, C/C++, and simulators.
• Knowledge of DAC/ADC/PLL testing techniques for high-speed ASICs.
• Practical scripting experience for automation.
• Strong communication skills and multitasking ability.

Preferred Assets:

• Experience with ATE platforms like Advantest V93000.
• Familiarity with Jira, GIT, Python, Make, Bash, and object-oriented programming.

Compensation: The annual pay range is $100,900 - $161,100, with comprehensive benefits including health plans, 401(K), employee stock purchase, and paid leave.

Additional Information: This is a full-time, entry-level position in the telecommunications industry. Ciena values diversity and is an equal opportunity employer. Join our Talent Community for updates and job alerts.