ASIC Digital Design Verification Engineer

Block; Toronto; Remote; CAD 90,000 - 115,000; Full time

Job summary

A technology company is seeking an ASIC Digital Design Verification Engineer to develop and verify next-generation mining technologies. This remote role requires deep expertise in digital ASIC verification, strong problem-solving skills, and proficiency in various EDA tools and scripting languages. Candidates must hold a Bachelor's degree in Electrical or Computer Engineering and have at least 5 years of relevant experience. Apply to help shape the future of decentralized finance.

Qualifications

• 5 years of hands-on experience in digital ASIC verification.
• Strong knowledge of verification methodologies, particularly UVM.
• Proficiency in scripting languages such as Python, Perl, Tcl, Make.

Responsibilities

• Develop and execute comprehensive test plans for individual IP blocks.
• Run gate-level simulations and analyze netlists.
• Support silicon bring-up activities in the lab.

Skills

Digital ASIC verification

Verification methodologies (UVM)

EDA tools (Synopsys VCS, Verdi)

Scripting languages (Python, Perl, Tcl, Make)

Silicon bring-up

Problem-solving skills

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree in Electrical/Computer Engineering

Tools

Oscilloscopes

Logic analyzers

FPGA prototyping tools (Xilinx Vivado)

Job description

Overview

Proto is accelerating the worlds transition to an open economy with products that increase access and independence for everyone. Were building Bitkey a simple and safe self-custody bitcoin wallet that will put customers in control as well as hardware and software that will help decentralize bitcoin mining and enable new and innovative use cases for bitcoin mining. Were developing these products in the open - you can read more about them at and . Within Proto our Bitcoin Products team delivers the product and go-to-market strategy software firmware and custom silicon needed to make Bitkey and our ambitious mining initiatives a reality. Come build the future of money with us!

Role

As an ASIC Digital Design Verification Engineer you will work closely with other digital designers and physical designers to develop the next generation of mining, particularly the challenges of chip/block simulation, emulation and verification are critical parts of this role.

Team and Location

We are a distributed team across the U.S. and Canada and are hiring for a single remote position.

Key Responsibilities

• Block- and Chip-Level Verification: Develop and execute comprehensive test plans for individual IP blocks and full-chip integrations.
• Gate-Level Simulation & Debug: Run gate-level simulations, analyze netlists and diagnose timing or logic issues.
• Silicon Bring-Up & Lab Debug: Support bring-up activities in the lab, perform board-level bring-up and troubleshoot silicon on hardware using oscilloscopes, logic analyzers etc.
• Automation & Scripting: Create and maintain scripts to streamline verification flows (e.g. regression, coverage collection and reporting).
• Cross-Functional Collaboration: Work closely with RTL designers, physical design, firmware and system teams to resolve issues quickly and efficiently.

Required Qualifications

• Bachelors degree in Electrical Engineering, Computer Engineering or a related field.
• 5 years of hands-on experience in digital ASIC verification.
• Strong knowledge of verification methodologies, particularly UVM.
• Proficiency with EDA tools such as Synopsys VCS, Verdi and waveform viewers.
• Solid experience with gate-level simulation.
• Experience with silicon bring-up and lab tools (oscilloscopes, logic analyzers etc.).
• Proficiency in scripting languages (Python, Perl, Tcl, Make).
• Strong problem-solving and analytical skills with attention to detail.

Preferred Qualifications

• Masters degree in Electrical or Computer Engineering.
• Familiarity with serial interfaces such as UART.
• Experience with common SoC IPs (PLL, GPIO etc).
• SystemVerilog RTL design experience.
• Exposure to full-chip emulation environments (e.g. Synopsys ZeBu).
• Hands-on experience with FPGA prototyping tools (e.g. Xilinx Vivado).

EEO and Inclusion

Were working to build a more inclusive economy where our customers have equal access to opportunity and we strive to live by these same values in building our workplace. Block is an equal opportunity employer evaluating all employees and job applicants without regard to identity or any legally protected class. We also consider qualified applicants with criminal histories for employment on our team and always assess candidates on an individualized basis. We believe in being fair and are committed to an inclusive interview experience including providing reasonable accommodations throughout the recruitment process. If you require an accommodation let your recruiter know. Want to learn more about what were doing to build an inclusive workplace Check out our Inclusion & Diversity page.

Key Details

• Employment Type : Full Time
• Experience : years
• Vacancy : 1