SystemC/TLM Modeling Engineer – Virtual Prototyping

Imec India Private Limited; Heverlee; Sur place; EUR 80 000 - 100 000; Plein temps

Résumé du poste

A leading research center in nanotechnology is seeking a Senior SystemC/TLM Modeling Engineer in Belgium. In this role, you will drive the development of advanced virtual platforms for next-generation systems. Ideal candidates will possess 5+ years of experience in SystemC and TLM modeling, strong proficiency in C++, and an understanding of computer architecture and co-design principles. Join a dynamic team committed to innovation and professional growth in an inclusive environment.

Prestations

Market-appropriate salary

Fringe benefits

Investments in personal development

Qualifications

• 5+ years of hands-on experience in SystemC and TLM modeling for complex SoC or system-level platforms.
• Deep expertise in C++ and SystemC with a proven track record of developing TLM 2.0 models.
• Experience with RTL design and integrating TLM with RTL for hybrid simulation environments is a plus.

Responsabilités

• Lead design and integration of SystemC/TLM models for SoC architectures.
• Develop and maintain reusable SystemC models that integrate with industry-standard tools.
• Collaborate with architects to define modeling requirements and validate system functionality.

Connaissances

SystemC

TLM modeling

C++

Computer architecture

Hardware/software co-design

Software engineering practices

Formation

Master's or Doctoral degree in Computer Science, Electrical/Computer Engineering, or a related field

Description du poste

SystemC/TLM Modeling Engineer – Virtual Prototyping

Join imec’s Compute System Architecture (CSA) center of excellence as a Senior SystemC/TLM Modeling Engineer, where you will drive the development of advanced virtual platforms for next-generation compute systems. This role is ideal for candidates with deep, hands‑on experience in SystemC and transaction-level modeling (TLM), who are passionate about architecture exploration, performance modeling, and enabling early hardware/software co‑design.

What you will do

• Lead the design, development, and integration of SystemC/TLM models for SoC architectures, memory controllers, interconnects, and custom IP blocks, enabling virtual prototyping and early system validation and performance modeling of future compute systems.
• Develop and maintain reusable, interoperable SystemC models that integrate with industry‑standard virtual platform tools and in‑house frameworks.
• Collaborate with hardware and software architects to define modeling requirements, validate system functionality, and support architecture exploration and design trade‑off studies.
• Develop and execute comprehensive testbenches for functional and performance verification of SystemC/TLM models, including debugging and root‑cause analysis at the system level.
• Document modeling methodologies, interfaces, and best practices to ensure model reusability and knowledge transfer across teams.

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, ‘our corporate university’, we actively invest in your development to further your technical and personal growth.

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits.

Who you are

• Master’s or Doctoral degree in Computer Science, Electrical/Computer Engineering, or a related field.
• 5+ years of hands‑on experience in SystemC and TLM modeling for complex SoC or system‑level platforms in an industrial or research setting.
• Deep expertise in C++ and SystemC, with a proven track record of developing, integrating, and optimizing TLM 2.0 models.
• Strong background in computer architecture, microarchitecture, and hardware/software co‑design.
• Experience with RTL design (Verilog/SystemVerilog/VHDL) and integrating TLM with RTL for hybrid simulation environments is a plus.
• Familiarity with standard hardware interfaces and protocols (e.g., AXI, NoC fabrics).
• Proficiency with modern software engineering practices (version control, CI/CD, unit testing).
• Excellent communication and collaboration skills; ability to work independently and as part of a cross‑functional team.

IMEC and its affiliates will not accept unsolicited resumes from any source other than directly from a candidate. IMEC will consider unsolicited referrals and/or resumes submitted by vendors such as search firms, staffing agencies, professional recruiters, fee‑based referral services and recruiting agencies (hereafter “Agency”) to have been referred by the Agency free of charge. IMEC will not pay a fee to any Agency that does not have a prior written agreement with IMEC, validated by its HR department, in place regarding a specific job opening and allowing to submit resumes.