Physical Design Engineer

IC Resources; Antwerpen; Sur place; EUR 60 000 - 90 000; Plein temps

Résumé du poste

IC Resources seeks a Physical Design Engineer to join their semiconductor R&D team in Antwerp, working on complex digital circuitry for advanced imaging technologies. The role covers RTL‑to‑GDS and backend methodology development, with hands-on implementation and optimisation across the flow.

Responsibilities include full backend flow execution, flow automation, and collaboration with analog/digital teams to meet project targets.

Qualifications

• Bachelor’s degree or above in microelectronics or related fields.
• Experience with the complete digital backend flow from RTL to GDS.
• Experience with industry-standard EDA tools.
• Proficiency in scripting languages (Tcl, Python).
• Experience with Cadence tools is preferred.
• Experience with CMOS image sensor architectures is highly desirable.

Responsabilités

• Execute the complete digital backend flow from RTL to GDS, including synthesis, floorplanning, power planning, place & route, clock tree synthesis (CTS), static timing analysis (STA) and logic equivalence checking (LEC).
• Provide innovative solutions to reach product targets and drive performance, power and area optimizations.
• Develop, maintain and enhance backend methodologies, flows and automation scripts.
• Collaborate closely with the analog team and the digital design and verification engineers to resolve implementation challenges and successfully complete the project.
• Participate in design/architecture reviews and risk assessments from a physical implementation perspective.

Connaissances

Backend flow experience

Scripting languages

Team collaboration

Formation

Bachelor’s degree in microelectronics or related fields

Outils

Cadence tools

EDA tools

Tcl

Python

Description du poste

This client is looking for a Physical Design Engineer to join their semiconductor R&D team in Antwerp, working on the implementation of complex digital circuitry for advanced imaging technologies.

This is a hands‑on Physical Design Engineer position covering the RTL-to-GDS flow, with scope to work across implementation, optimisation and backend methodology development.

Key responsibilities

• Execute the complete digital backend flow from RTL to GDS, including synthesis, floorplanning, power planning, place & route, clock tree synthesis (CTS), static timing analysis (STA) and logic equivalence checking (LEC)
• Provide innovative solutions to reach product targets and drive performance, power and area optimizations
• Develop, maintain and enhance backend methodologies, flows and automation scripts
• Collaborate closely with the analog team and the digital design and verification engineers to resolve implementation challenges and successfully complete the project
• Participate in design/architecture reviews and risk assessments from a physical implementation perspective

Position Qualifications

• Bachelor’s degree or above in microelectronics or related fields
• Experience with the complete digital backend flow from RTL to GDS
• Experience with industry-standard EDA tools
• Proficiency in scripting languages (Tcl, Python)
• Experience with Cadence tools is preferred
• Experience with CMOS image sensor architectures is highly desireable

For more information on this role or others then please contact Jordan Browne at IC Resources.