Image Sensor Architect

eyeo; Antwerpen; Sur place; EUR 120 000 - 190 000; Plein temps

Résumé du poste

eyeo is seeking an Image Sensor Architect to define and develop cutting-edge CMOS image sensor architectures for high-performance, low-power applications. You will collaborate with multi-disciplinary teams to deliver world-class imaging solutions for diverse markets.

With 10–15 years of sensor design experience, you will drive pixel design like 4T, HDR, and PDAF, along with readout, timing, and data interfaces.

Qualifications

• Master's or PhD required in Electrical Engineering, Microelectronics, or Physics.
• Proven track record in CMOS image sensor design and imaging applications.
• Strong background in mixed-signal/analog design and HDR architectures.
• Experience with system-level verification and sensor performance modelling.

Responsabilités

• Define top-level CMOS image sensor architecture and design specifications.
• Define pixel architectures (4T, HDR schemes) and readout topology.
• Define on-chip digital data pipeline, data interfaces (MIPI CSI-2).
• Collaborate with RTL, hardware, firmware and ISP teams for integration.
• Drive technology roadmap, technology options, and vendor/IP integration.

Connaissances

CMOS image sensor design

Mixed-signal & analog

System-level verification

Cadence tools

Formation

Master's or PhD in Electrical Engineering, Microelectronics, or Physics

Outils

Cadence

Description du poste

eyeo is an innovative, fast-growing start-up that brings groundbreaking technology in the image sensor space. Our advanced color splitter technology has the potential to disrupt a $25 billion market in the coming years, enabling transformative advancements across industries such as consumer electronics, automotive, medical imaging, and surveillance. You will have the unique opportunity to shape the future of our product offerings and contribute directly to our mission of revolutionizing the imaging technology sector. If you're passionate about driving innovation and want to build the future of imaging, we want you on our team!

About the Role:

As an Image Sensor Architect, you will define and develop cutting-edge CMOS image sensor architectures for high-performance and low-power applications for a variety of market segments. This role requires deep technical expertise in sensor design, foundry processes and system integration, combined with the ability to collaborate across multi-disciplinary teams to deliver world-class imaging solutions.

Key Responsibilities

• Define top-level architecture and design specifications for CMOS image sensors.
• Define pixel architecture (such as 4T, DCG, LOFIC, PDAF and other HDR schemes).
• Define readout architecture and ADC topology, including bias/reference circuits.
• Build sensor performance models (noise, DR, power, throughput)
• Define technology roadmap (pixel pitch / node / stacking)
• Drive co-design between photonics, pixel and readout chain
• Explore and evaluate technology options and system constraints to identify optimal design approaches.
• Identify possibilities for integration of 3rd party IP blocks.
• Define the architecture of the on-chip digital data pipeline including pixel data aggregation, buffering, and formatting.
• Specify digital processing blocks such as digital CDS, defect correction, HDR merging, binning, and gain control.
• Define sensor timing and control architecture (exposure control, shutter schemes, frame sequencing).
• Define output data interfaces (e.g., MIPI CSI-2) and bandwidth requirements.
• Work closely with RTL teams to translate architecture into implementation.

System Integration

• Collaborate with hardware, firmware, and ISP teams to ensure seamless integration of sensors into camera systems.
• Drive chip-level architecture specifications through implementation and verification phases.
• Conduct feasibility studies and simulations for novel sensor concepts, including integration of color-splitting photonic structures.
• Stay ahead of industry trends and emerging technologies in image sensing.

Cross-functional Collaboration

• Work closely with internal teams and external teams to align on requirements and performance targets.
• Participate in system-level performance evaluations and optimization.

Qualifications

Education

• Master's or PhD in Electrical Engineering, Microelectronics, or Physics.

Experience

• 10-15 years in CMOS image sensor design or related semiconductor fields.
• Proven track record in mixed-signal and analog design for imaging applications in BSI and stacked-BSI processes.
• Proven track record in the image sensor industry

Skills

• Expertise in sensor architecture, signal flow, and verification methodologies.
• Proficiency in simulation tools (e.g., Cadence).
• Deep understanding of pixel physics, noise modelling (kTC, shot, RTS, 1/f) and HDR architectures.
• Strong understanding of image sensor performance metrics (QE, SNR, HDR, MTF, etc.).Knowledge on image processing is a strong plus.

Soft Skills

• Creative problem-solving, effective communication, and ability to work in a fast-paced start-up environment.

Start-Up Mindset

Why Join eyeo?

• Groundbreaking Technology: Work on transformative technology with the potential to disrupt a $25 billion market and change the future of image sensing.
• Early Impact: Your contributions will directly shape the company’s success, culture, and product offerings.
• Innovation: Be part of a start-up that's pioneering new solutions in the imaging space and working on high-impact, innovative products.
• Collaborative Environment: Join a passionate, agile team where collaboration, trust, and innovation are at the heart of everything we do.
• Growth Opportunities: As eyeo scales, you’ll have opportunities to take on new challenges, responsibilities, and leadership roles within the company.