Technical Project Manager (Embedded)

Silicon Quantum Computing Pty Ltd; Sydney; On-site; AUD 120,000 - 170,000; Full time

Job summary

Silicon Quantum Computing Pty Ltd in Sydney seeks a Technical Project Manager (Embedded) to own the hardware and software delivery schedule for the USQC program. You will manage the detailed end-to-end schedule across embedded hardware, firmware and software, coordinating with design, fabrication and integration teams.

You will report to the Senior Technical Program Manager and coordinate with external partners and suppliers.

Qualifications

• Experience delivering embedded programs with fixed external milestones.
• Proven track record managing hardware/software schedules across multiple workstreams including external partners.
• Experience with Agile delivery (Scrum or Kanban) across hardware and software teams.
• Experience managing external partners or subcontractors in a hardware program.
• Strong communication in a matrix environment and ability to escalate risks clearly.

Responsibilities

• Own the schedule for cryogenic and conventional ASIC tapeouts from design freeze through fabrication, characterisation, and foundry coordination.
• Own the delivery schedule for compiler, decoder and real-time control plane software releases, including the release train and R&D deliverables.
• Build and maintain a credible critical path across hardware, firmware and software through fabrication, measurement and subcontractor deliverables.
• Flag tapeout, foundry, and release risks early, then drive replanning and communicate schedule, cost, and technical impacts.
• Plan and track FPGA hardware development from requirements through deployment.
• Plan and track cryogenic interface and control system development, including coordination with external technology partners.
• Define test readiness and release criteria with hardware and software leads and track them to closure.
• Run structured risk assessment for each embedded workstream, with a mitigation plan for every dependency.
• Hold engineering teams to their commitments, challenge estimates, and elevate slippage to the Senior Technical Program Manager.
• Apply SDLC and quality processes consistently across the embedded teams.

Skills

Embedded systems

FPGA development

SDLC / release management

Agile delivery

Vendor management

Risk management

Job description

Technical Project Manager (Embedded) at Silicon Quantum Computing, Sydney. A mid-level full time position in the Projects team, listed under hardware engineering.

About the role

SQC builds gate-based quantum computers in silicon. Our largest programs are multi-year commitments to US government sponsors, delivered against fixed benchmarks, milestones and independent evaluation. We are hiring a Technical Project Manager (Embedded) into Projects to own the hardware and software delivery schedule for the USQC program.

You will own the detailed schedule end to end for the embedded hardware and software work.You will hold a critical path that runs through fabrication, cryogenic test, firmware and software release, and external partner deliverables. Predictability is the core of the job. You will flag early when a tapeout or release is at risk, and when a test result or blocker lands, you will replan quickly and make the consequences clear to the people who need to act on them.

You will work directly with the hardware and software engineering leads on technical readiness, including test plans, release criteria and the hand-off between design, fabrication and integration. You will also manage the embedded partners and subcontractors whose deliverables feed the tapeout and software schedules.

You will report to the Senior Technical Program Manager. Escalate commercial priorities, scope changes and government requirements to them rather than absorbing them into the embedded plan.

Based at our Sydney facility, you will work across the hardware and software teams, moving between technical detail with engineers, clear synthesis for management, and concise updates for the executive and the CEO. This is a role for someone with a genuine project management mindset: structured, disciplined about following defined processes, personally committed to milestones, and comfortable challenging engineering estimates and pushing back when delivery slips.

Responsibilities

• Own the schedule for cryogenic and conventional ASIC tapeouts, from design freeze through fabrication, characterisation, and foundry coordination.
• Own the delivery schedule for compiler, decoder and real-time control plane software releases, including the release train and the R&D deliverables that depend on them.
• Build and maintain a credible critical path across hardware, firmware and software, through fabrication, measurement and subcontractor deliverables.
• Flag tapeout, foundry, and release risks early, then drive replanning and communicate schedule, cost, and technical impacts.
• Plan and track FPGA hardware development, from requirements through deployment.
• Plan and track cryogenic interface and control system development, including coordination with external technology partners.
• Define test readiness and release criteria with the hardware and software leads and track them to closure.
• Run structured risk assessment for each embedded workstream, with a mitigation plan for every dependency.
• Hold engineering teams to their commitments, challenge estimates, and elevate slippage to the Senior Technical Program Manager.
• Apply SDLC and quality processes consistently across the embedded teams.

Requirements

• Experience with embedded systems, including FPGA development.
• Experience with software release management or SDLC, ideally on compiler, firmware or FPGA workstreams.
• A track record of delivering hardware or embedded programs against fixed external milestones, where the deadline does not move.
• Experience owning detailed schedules across hardware and software workstreams, including external partners and subcontractors.
• Experience managing external partners or suppliers delivering into a hardware program.
• A background in semiconductor, test engineering, embedded systems or hardware program management, where hardware dependencies carry real schedule risk.
• A structured approach to risk, identifying dependencies early and maintaining credible mitigation plans.
• Experience with Agile delivery (Scrum or Kanban) across hardware and software teams.
• Willing to hold the line, challenging estimates and pushing back when delivery slips.
• Strong communication across engineers and management in a matrix environment.