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Silicon Quantum Computing Pty Ltd is seeking a mid-level Software Engineer for its Control & Error Correction team in Sydney. You will join the software group to contribute to the realtime engine inside the quantum computer, implementing control, error correction and logical qubit management on FPGA hardware with Rust and Python tooling.
The role operates under strict latency budgets for both NISQ and fault-tolerant modes, requiring expertise in HDL, embedded systems and low-latency data paths.
Software Engineer, Control & Error Correction at Silicon Quantum Computing, Sydney. A mid-level full time position in the Software team, listed under software engineering.
Silicon Quantum Computing (SQC) is at the forefront of global efforts to build the world’s first commercial-scale quantum computer, while delivering quantum-enhanced AI and simulation products to customers today. Backed by over 25 years of technological excellence, SQC is a full-stack quantum computing company that leverages its proprietary manufacturing process to engineer atomic qubits in silicon with 0.13 nanometer precision. It is the most precise semiconductor manufacturing in the world, enabling systems with world-leading algorithmic fidelity, and a decisive advantage in the global quantum computing race. Our products are commercially deployed and generating revenue. Watermelon, our quantum-enhanced AI system, is delivering superior results on real-world problems across energy, telecom and finance. Quantum Twins, our simulation platform, provides unparalleled ability to model quantum systems, accelerating molecule and materials discovery. This is SQC: building the future of computing while delivering quantum impact today.
About the role We are hiring software engineers into Control & Error Correction, the team that builds the realtime engine inside the quantum computer: the software and digital logic that executes circuits, corrects errors and manages logical qubit operations, in NISQ mode today and fault-tolerant mode as the system scales. These components form the Realtime Quantum Control Plane, running across a mesh of FPGA cards wired to cryogenic hardware. Time is the constraint. A correction has to come back inside about a microsecond. The scheduler allocates logical qubits across cards without adding latency of its own, and nothing on the hot path allocates, blocks or pauses. The limit is set by the physics, and no later optimisation recovers a missed budget. The work spans the realtime scheduler, the NISQ pulse compiler in Rust and Python, logical measurement and Pauli frame tracking across chiplets, magic state distillation, and the decoder path from