Pilot Line PDK & Design Enablement Lead (all genders)

Silicon Austria Labs GmbH; Kleinsattel; Vor Ort; EUR 63.000 - 77.000; Vollzeit

Benefits dieser Stelle

€4 per day meal allowance

Public transport subsidy

Family-friendly policies

Zusammenfassung

Silicon Austria Labs GmbH is looking for a Pilot Line PDK & Design Enablement Lead in Kärnten, Austria. The role involves leading the PDK function across various technology platforms and ensuring alignment with fabrication capabilities. Responsibilities include managing PDK strategy, release processes, and interfacing between designers and fabrication teams.

Successful candidates will have at least 8 years of relevant experience, a master's or doctorate in a related field, and excellent communication skills. The position offers a competitive salary, relocation support for non-European applicants, and a variety of employee benefits.

Qualifikationen

• 8+ years of experience in PDK development and design enablement in semiconductor/photonics.
• Solid understanding of design-fabrication interface and process variability.
• Hands-on experience with EDA ecosystems and model calibration.

Aufgaben

• Define and maintain a consolidated PDK roadmap aligned with platform evolution.
• Establish a structured release process and ensure predictable delivery.
• Act as the interface between designers and fabrication teams.

Kenntnisse

PDK development

Design enablement

Automation skills (Python/TCL)

Communication skills

Ausbildung

MSc/PhD in EE, Physics, Photonics, Microsystems

Tools

EDA toolchains

Jobbeschreibung

Pilot Line PDK & Design Enablement Lead (all genders)

In the Position as Staff Research Engineer you are responsible for the central PDK function across SAL’s technology platforms and pilot-line activities. You ensure that PDK content, models, verification flows, documentation, and release processes are consistent, traceable, and aligned with fabrication capabilities—enabling reliable design-to-fab handshakes for internal teams and open-access users (with a strong relevance for integrated photonics and related quantum/MEMS device concepts).

Your future tasks include:

• PDK strategy & roadmap: define and maintain a consolidated PDK roadmap (priorities, maturity targets, releases) aligned with platform and fabrication evolution.
• PDK governance & release management: establish a structured release process (versioning, release notes, change control, qualification evidence, deprecation rules) and ensure predictable delivery for users.
• Design-to-fab interface: act as the interface between designers and fabrication teams to align layer definitions, design rules, tolerances, process assumptions, sign-off criteria, and handover packages.
• PDK content quality: own quality of PDK deliverables such as DRC/LVS/PEX flows (as applicable), models, corners/variability knobs, examples, and user documentation.
• Validation & calibration: coordinate validation and calibration plans with measurement/metrology and process teams; ensure model updates are evidence-based and traceable to wafer data.
• EDA and enablement flows: maintain compatibility with relevant EDA toolchains; provide reference flows, templates, and automation where beneficial (build/release tooling, regression checks).
• User support & enablement: support internal teams and selected external open-access users (onboarding, requirements clarification, feedback capture) and translate user needs into backlog items.
• Documentation & know-how management: ensure strong documentation discipline and coordinate what can be shared externally vs what must be protected, in collaboration with responsible functions.

Your profile:

• Strong experience (min. 8+ years) in PDK development and design enablement (verification flows, models, documentation, releases) in a semiconductor / photonics / MEMS‑related environment.
• MSc/PhD in EE, Physics, Photonics, Microsystems, or comparable.
• Solid understanding of the design–fabrication interface and how process variability impacts models, rules, and design margins.
• Hands‑on experience with EDA ecosystems and PDK integration; scripting/automation skills (e.g., Python/TCL) are a strong plus.
• Experience working with wafer data for model calibration/validation and structured change control.
• Strong communication skills and ability to coordinate across a matrix organization (design, process teams, metrology, external users).
• Fluent English; German is a plus.

Important Facts about SAL:

• Diverse research activities with many technical challenges.
• State‑of‑the‑art laboratory facilities and equipment.
• Location in the heart of Europe in Austria – relocation support for non‑European nationalities.
• Internal and external training opportunities for career development.
• Family & children friendly - actively shaping the compatibility of family and career.
• “Vital4SAL” to promote a healthy workplace (e.g. SAL coaching pool, trainings on mental health, physical activities, healthy snacks, 24/7 accident insurance)
• € 4 per day meal allowance in restaurants or € 2 per working day in supermarkets.
• Public transport initiative (subsidy for the “Klimaticket”)
• Our values: Open door policy, flexibility in working hours, casual dress code, diverse teams, working with people of different nationalities, informal communication, lifelong learning, compatibility of family and career, sustainability, personal growth, and collective advancement.

This position is subject to the Collective Agreement for employees in non-university research (Research CA) starting in occupational group F (F1 salary = EUR 4.868, paid 14 times a year). For this position we offer competitive salaries and additional benefits based on your experience and qualifications, starting with a minimum gross salary of EUR 70.000 (annual, based on an All-in contract and bonus).