Wearable Hardware Systems Architect — Edge AI & SoC

Google

Mountain View (CA)

On-site

USD 188,000 - 274,000

Full time

6 days ago
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Job summary

Google's Watch Hardware Engineering team is seeking a System Architect to define and implement hardware architecture for wearable products enabling ambient and edge computing. You will guide system design and platform architecture to meet performance, power, and cost goals across critical user journeys.

You will collaborate with silicon vendors and partners, ensuring seamless subsystems and data paths, and drive technical consensus across engineering, software and product teams.

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
  • 6 years of experience working in a consumer electronics environment.
  • 3 years of experience in technical leadership.

Responsibilities

  • Architect the data processing paths and hardware-software interfaces for ambient and edge computing applications on wearable hardware.
  • Define system and component-level specifications for performance, power, and thermals. Support critical user journeys, including on-device AI for audio and ecosystem interoperability across Google's platforms.
  • Evaluate the critical trade-offs between power, cost, and form factor. Select chipsets and key components while influencing supplier road maps to deliver optimized solutions.
  • Oversee system prototyping and integration. Drive the validation and optimization process to ensure all hardware meets established key performance indicators.
  • Investigate emerging technologies, algorithms, and architectures to drive innovation for future wearable products.

Education

Bachelor's degree or equivalent practical experience

Job description

Google's Watch Hardware Engineering team is seeking a System Architect to define and implement hardware architecture for wearable products enabling ambient and edge computing. You will guide system design and platform architecture to meet performance, power, and cost goals across critical user journeys.

You will collaborate with silicon vendors and partners, ensuring seamless subsystems and data paths, and drive technical consensus across engineering, software and product teams.

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