Test & Silicon-Validation Lead

AIDAChip Inc; San Francisco, Northern (CA, KY); Hybrid; USD 180,000 - 280,000; Full time

Job summary

AIDAChip Inc in San Francisco seeks a senior test and silicon validation expert to own validation across DFT, ATE and lab bring-up for our AI-native silicon platform. You define what 'correct' means for each teammate and ensure the system behaves as a cohesive whole before customers see it.

You’ll craft customer playbooks, partner with forward-deployed engineers, and close the loop from tapeout to production ramp.

Qualifications

• 10+ years in test / DFT / post-silicon validation with depth in at least two areas and credible in the third.
• Multiple products from tapeout through first-silicon bring-up to production, including volume shipment.
• DFT: scan insertion, ATPG, MBIST, boundary scan, test compression, fault-coverage closure.
• ATE / production test: test-program development across tester platforms (Advantest, Teradyne), pattern conversion, yield/bin analysis.
• Lab / characterization: first-silicon bring-up, PVT characterization, bench measurement and automation, silicon-to-simulation correlation.
• An opinion on where the designsilicon gap breaks and how to catch it earlier.
• Ability to write clear specifications for a system that follows your words.

Responsibilities

• Every test & silicon-validation AI teammate on the platform; set 'correct' and the bar before customer exposure.
• Customer playbooks: translate customer methodology into repeatable deployment; collaborate with forward-deployed engineers.
• Correlate silicon back to design intent and close the loop from tapeout bring-up to production ramp.

Skills

Test/DFT depth

ATE / Production test

Silicon bring-up

Python analysis

System spec writing

Customer engagement

Education

Bachelor's in Electrical Engineering

Tools

Advantest

Teradyne

Job description

AIDAChip is the Alignment OS for AI-native silicon engineering teams — the first AI platform built for chip design teams, not just individuals. Chip design today is fragmented across disciplines, tools, and handoffs, so intent gets lost and work drifts. We're the shared nervous system that keeps intent, knowledge, and execution aligned from specification to tapeout.

The Role

We build a multiplayer system, not a shelf of standalone agents: our AI teammates share design intent, compound what the team learns, and run tools, EDA and test flows. The alignment is the product; the agents and the platform are how it gets delivered.

You are the human authority on test and silicon validation for that system. You decide what "correct" means for each test and validation AI teammate, when it's good enough to put in front of a customer, and how they behave as a set rather than as point tools. Everything you shape ships to someone with a tapeout date and a production ramp, and the AI does not do the engineering for you. You are the reason it gets good.

Key responsibilities

• Every test & silicon-validation AI teammate on the platform — DFT, production / ATE test, and lab bring-up & characterization, plus the handoffs between them. You set what "correct" means for each, the bar for putting it in front of a customer, and how they behave as a system rather than point tools.
• Customer playbooks — turn a customer's test methodology, coverage bar, bring-up flow, and production-test criteria into something repeatable we can deploy. This is customer-facing work. _(You'll partner with our forward-deployed engineers, who own the deployment relationship — you own the test/validation methodology depth.)_
• The designsilicon seam — correlating real silicon back to design intent and spec, and closing the loop from tapeout bring-up production. Most teams let post-silicon learning evaporate. We can't.

You may be a good fit if you have

• 10+ years in test / DFT / post-silicon validation, with deep hands-on depth in at least two of DFT, ATE / production test, and silicon bring-up / characterization — and credible in the third. The breadth is the job, not a bonus.
• Multiple products taken from tapeout through first-silicon bring-up to production, with silicon shipped in volume — some at advanced nodes.
• DFT: scan insertion, ATPG, MBIST, boundary scan, test compression, and fault-coverage closure.
• ATE / production test: test-program development across industry tester platforms (Advantest, Teradyne), pattern conversion, yield / bin analysis, and characterization-to-datasheet correlation.
• Lab / characterization: first-silicon bring-up, PVT characterization, bench measurement and automation, silicon-to-simulation correlation, and failure analysis / debug.
• A considered opinion on where the designsilicon gap actually breaks — and how to catch it earlier.
• Writing clear enough to specify behavior for a system that follows your words literally. This matters more here than in a normal test role.

Strong candidates may also have experience with

• Mixed-signal / AMS characterization — RF, analog, or high-speed I/O bring-up and correlation.
• Hands-on time with LLMs or agentic tooling — even if it went badly. We'd rather hear what failed.
• Test automation and data-heavy analysis (yield, characterization) in Python.
• CAD / EDA or test-program automation background.

How we're different

• Evidence over vibes: nothing is "done" until it's proven — results carry their proof, claims are verified before they're asserted, and failures surface loudly instead of slipping through
• Measured, not narrated: if it isn't measured, it did not happen — we decide on data in a shared system of record, not on how good the update sounded
• Agent leverage: every person directs a fleet of AI teammates and delivers at a multiple of what a lone expert could, without lowering the bar
• Human-in-the-loop by design: the AI proposes; a human owns the calls that matter — judgment stays with the expert
• Greenfield ownership: you own a whole problem end to end — a real workstream on a production platform serving enterprise silicon customers, not a demo