Technical Lead Product Engineer, RF

Astera Labs; San Jose (CA); On-site; USD 160,000 - 200,000; Full time

Job summary

Astera Labs is seeking a Technical Lead Product Engineer to join our San Jose team. You will own RF and signal integrity across high‑speed interfaces, guiding silicon characterization, validation, and production test from tape‑out to high‑volume manufacturing.

You will work with design, applications, and operations to ensure performance and reliability, tackling challenging RF/physical layer problems as part of a growth‑oriented organization.

Qualifications

• Bachelor's degree in Electrical Engineering, RF Engineering, or a related field.
• 5+ years of experience in product engineering, RF characterization, or signal integrity for high‑speed semiconductor products.
• Hands-on experience with RF/SI lab equipment including high‑bandwidth oscilloscopes, vector network analyzers, BERTs, and TDRs.
• Strong understanding of high‑speed SerDes physical layer concepts including equalisation, jitter analysis, S‑parameters, and channel modelling.
• Experience with ATE test development and production test methodologies for high‑speed I/O.
• Proficiency in data analysis and scripting (Python, MATLAB, or similar).

Responsibilities

• Lead RF and SI characterization of high‑speed SerDes across PCIe Gen 6/7, Ethernet, and UALink/UCI interfaces. Perform bench measurements to validate silicon performance.
• Develop and optimize ATE test programs for RF and high‑speed I/O parametric testing.
• Provide RF and physical layer expertise to support customer platform bring‑up and debug activities.
• Collaborate with silicon design teams to provide characterization feedback for product improvements and DFx.
• Drive DFT and production-test learnings into design and datasheet development.

Skills

Data analysis

Python

MATLAB

Scripting

Communication skills

RF engineering concepts

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering (RF/Microwave)

Tools

Oscilloscopes

Vector Network Analyzers (VNA)

BERTs

TDRs

Test equipment

Job description

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at www.asteralabs.com.

Role Overview

Astera Labs is seeking a Technical Lead Product Engineer to join our team in San Jose, CA. In this role, you will be at the intersection of silicon development and production excellence, ensuring our industry-leading connectivity solutions meet the highest standards of performance, reliability, and quality as they scale to volume production. As a key technical contributor, you will own the RF and signal integrity aspects of product engineering — from silicon characterization and validation through production test development and customer‑facing debug. You'll work across the full product lifecycle, partnering with design, applications, and operations teams to drive our connectivity products from tape‑out to high‑volume manufacturing. This is a high‑impact role at a company experiencing explosive growth, where your work directly enables the AI infrastructure revolution. With Astera Labs' portfolio spanning PCIe retimers, Ethernet solutions, and next‑generation switching silicon operating at the bleeding edge of SerDes performance, you’ll tackle some of the most demanding RF and physical layer challenges in the semiconductor industry.

Key Responsibilities

• Silicon Characterization & Validation
  

  Lead RF and signal integrity characterization of high‑speed SerDes across PCIe Gen 6/7, Ethernet, and UALink/UCI interfaces. Perform bench measurements using high‑speed oscilloscopes, VNAs, BERTs, and TDRs to validate silicon performance against specifications. Analyze S‑parameters, eye diagrams, jitter, and channel loss to characterize physical layer performance across PVT corners. Drive silicon qualification and reliability testing to ensure products meet production readiness criteria.

• Production Test Development
  

  Develop and optimize ATE test programs for RF and high‑speed I/O parametric testing. Define test coverage strategies that balance quality, cost, and throughput for volume manufacturing. Correlate bench characterization results with ATE measurements to ensure production screening effectiveness. Partner with OSAT and test vendors to bring up and qualify production test hardware and loadboards.

• Customer Debug & Applications Support
  

  Provide RF and physical layer expertise to support customer platform bring‑up and debug activities. Analyze field returns and customer escalations related to signal integrity and link performance issues. Develop reference measurement methodologies and application notes for high‑speed interfaces. Collaborate with applications engineering to resolve interoperability challenges across diverse customer platforms.

• Cross‑Functional Engineering Collaboration
  

  Partner with silicon design teams to provide characterization feedback that informs next‑generation product improvements. Drive DFT and design‑for‑manufacturing improvements based on production test learnings. Contribute to product specifications and datasheet development with measured silicon performance data.

Basic Qualifications

• Bachelor's degree in Electrical Engineering, RF Engineering, or a related field.
• 5+ years of experience in product engineering, RF characterisation, or signal integrity for high‑speed semiconductor products.
• Hands‑on experience with RF/SI lab equipment including high‑bandwidth oscilloscopes, vector network analyzers, BERTs, and TDRs.
• Strong understanding of high‑speed SerDes physical layer concepts including equalisation, jitter analysis, S‑parameters, and channel modelling.
• Experience with ATE test development and production test methodologies for high‑speed I/O.
• Proficiency in data analysis and scripting (Python, MATLAB, or similar).

Preferred Qualifications

• Master's degree in Electrical Engineering with emphasis on RF, microwave, or signal integrity.
• Experience with PCIe, Ethernet, or CXL/UALink interface specifications and compliance testing.
• Familiarity with high‑speed connector/channel design and PCB stack‑up optimisation.
• Experience with statistical analysis techniques (Cpk, GRR, outlier screening) for production test.
• Strong communication skills with the ability to present complex RF concepts to cross‑functional audiences and customers.
• Prior experience at a fabless semiconductor company operating in high‑growth environments.

Salary range: $160,000 to $200,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.

We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of colour, LGBTQ+ and non‑binary people, veterans, parents, and individuals with disabilities.