TDL Hardware Manager - FPGA and Digital Systems

Harris Geospatial Solutions; Carlsbad (CA); On-site; USD 153,000 - 284,000; Full time

Job summary

L3Harris Technologies is seeking a Senior Hardware Manager - Digital Systems in Carlsbad, California. Lead the FPGA and digital-hardware engineering team across architecture, design, development, verification, and production, coordinating across wireless communications, modems, networking, DSP, and EW applications.

You will set technical vision, prioritize work, and mentor engineers to ensure delivery within budget and schedule.

Qualifications

• Bachelor's degree with a minimum of 12 years of related experience, or a graduate degree with a minimum of 10 years of related experience, or 16 years of experience in lieu of a degree.
• Experience with VHDL or Verilog and implementation of complex modem or DSP circuits in programmable logic; comparable ASIC experience is applicable.
• Experience with discrete-time DSP, digital communications, high-speed DSP data paths, FFTs, error-correction codes, Turbo or LDPC, modulation/demodulation.
• Experience with high-speed interfaces (Ethernet, PCIe) and memory controllers; reading schematics and lab debugging.

Responsibilities

• Lead architecture, design, development, modification, evaluation, integration, and production support for FPGA and digital-hardware systems.
• Create technical vision, strategy, staffing plans, and execution priorities for the FPGA and digital-hardware team.
• Coordinate personnel, laboratory resources, tools, and technical support for programs and production activities.
• Direct technical, schedule, and cost performance for FPGA and digital-hardware scope and manage risks.
• Lead the full design lifecycle from proposal through production and verification.
• Mentor engineers and build a strong, capable team across programs.

Skills

FPGA design leadership

Digital hardware engineering

VHDL/Verilog

DSP architecture

Electrical engineering

Education

Bachelor's degree

Graduate degree

Tools

MATLAB

SystemC

C/C++

Git

JIRA

Bitbucket

Job description

L3Harris is dedicated to recruiting and developing high-performing talent who are passionate about what they do. Our employees are unified in a shared dedication to our customers’ mission and quest for professional growth. L3Harris provides an inclusive, engaging environment designed to empower employees and promote work-life success. Fundamental to our culture is an unwavering focus on values, dedication to our communities, and commitment to excellence in everything we do.

L3Harris is the Trusted Disruptor in defense tech. With customers’ mission-critical needs always in mind, our employees deliver end-to-end technology solutions connecting the space, air, land, sea and cyber domains in the interest of national security.

Job Title: Senior Hardware Manager - Digital Systems

Job Code: EEM6

Job Location: Carlsbad, California

Job Schedule: 9/80: Employees work 9 out of every 14 days- totaling 80 hours worked- and have every other Friday off

Job Description:

Lead the FPGA and digital-hardware engineering function for complex Tactical Data Links systems, including architecture, design, development, modification, evaluation, integration, verification, and production execution. Set technical vision and execution priorities while coordinating personnel, lab resources, tools, and cross-functional support across wireless digital communications, modems, networking, digital signal processing, and electronic-warfare applications. Lead, develop, and retain a high-performing team of FPGA and digital-hardware engineers through clear priorities, regular coaching, performance management, and career-development planning. Build the organization’s technical bench by hiring strategically, mentoring emerging leaders, and aligning individual assignments with program needs and growth opportunities. Foster a culture of accountability, collaboration, inclusion, andcontinuous improvement while ensuring workload, staffing, and technical resources are balanced across programs and priorities.

Essential Functions:

• Lead architecture, design, development, modification, evaluation, integration, and production support for FPGA and digital-hardware systems, components, and integrated circuitry.
• Create technical vision, strategy, staffing plans, and execution priorities for the FPGA and digital-hardware team.
• Coordinate personnel, laboratory resources, tools, and technical support required for programs, proposals, pursuits, IRAD, development, integration, production, and sustaining work.
• Direct technical, schedule, and cost performance for FPGA and digital-hardware scope; review key technical decisions, deliverables, estimates, risks, and corrective actions.
• Guide the full design lifecycle from proposals and requirements definition through coding, simulation, synthesis, place and route, verification, test, and transition to production.
• Lead analysis, test, debug, and evaluation activities that establish operating data, validate designs, and resolve technical risks.
• Set design approaches, staffing priorities, and technical parameters based on electrical requirements, feasibility, schedule, cost, reliability, and long-term sustainability.
• Lead, mentor, develop, and retain engineers and technical leaders; align workforce capability and resources with business priorities.
• Build a culture of innovation, accountability, transparency, collaboration, and continuous improvement while influencing engineering leaders, customers, suppliers, and cross-functional partners.
• Partner with systems, software, RF, mechanical, manufacturing, test, program management, and business development to align technology roadmaps, proposals, execution, and customer commitments.
• Active or obtainable Secret security clearance.

Qualifications:

• Bachelor's degree with a minimum of 12 years of prior related experience, graduate degree with a minimum of 10 years of prior related experience, or in lieu of a degree a minimum of 16 years of prior related experience.

Preferred Additional Skills:

• Strong root-cause analysis, technical judgment, and decision-making across multiple functions or business areas.
• Experience with VHDL or Verilog and implementation of complex modem or DSP circuits in programmable logic; comparable ASIC experience is applicable.
• Experience with discrete-time DSP, digital communications, high-speed DSP data paths, digital filters, FFTs, error-correction codes, Turbo or LDPC, modulation, demodulation, and forward-error correction.
• Experience with high-speed serial interfaces, Ethernet, SPI, UART, SDRAM, DDR, JESD, PCIe, memory controllers, and software-to-FPGA interfaces.
• Experience with laboratory debug techniques using digital scopes, logic analyzers, BERTs, and other complex measurement devices.
• Working knowledge of testbench architectures, MATLAB, SystemC, C, or C++; ability to read, understand, and review schematic drawings.
• Experience with Git, Bitbucket, JIRA, and disciplined configuration management.
• Experience translating strategy into clear priorities, staffing plans, technical roadmaps, and execution outcomes.
• Experience leading cross-functional engineering teams and providing compelling technical briefings to senior leaders.
• Broad management and cross-functional leadership knowledge with mastery in digital design, electrical engineering, or closely related technical areas.
• Demonstrated experience leading experienced professionals, supervisors, or managers in a complex technical environment.
• Strong background in digital design, analysis, integration, simulation, synthesis, verification, test, evaluation, and production support for complex hardware systems.
• Experience with wireless digital communications, modems, networking, digital signal processing, electronic warfare, or comparable high-performance digital systems.
• Ability to communicate and influence leadership regarding matters of substantial importance to the function or business area.

In compliance with pay transparency requirements, the salary range for this role in California is $153k - $284k. This is not a guarantee of compensation or salary, as final offer amount may vary based on factors including but not limited to experience and geographic location. L3Harris also offers a variety of benefits, including health and disability insurance, 401(k) match, flexible spending accounts, EAP, education assistance, parental leave, paid time off, and company-paid holidays. The specific programs and options available to an employee may vary depending on date of hire, schedule type, and the applicability of collective bargaining agreements.

L3Harris Technologies is proud to be an Equal Opportunity Employer. L3Harris is committed to treating all employees and applicants for employment with respect and dignity and maintaining a workplace that is free from unlawful discrimination. All applicants will be considered for employment without regard to race, color, religion, age, national origin, ancestry, ethnicity, gender (including pregnancy, childbirth, breastfeeding or other related medical conditions), gender identity, gender expression, sexual orientation, marital status, veteran status, disability, genetic information, citizenship status, characteristic or membership in any other group protected by federal, state or local laws. L3Harris maintains a drug-free workplace and performs pre-employment substance abuse testing and background checks, where permitted by law.

Please be aware many of our positions require the ability to obtain a security clearance. Security clearances may only be granted to U.S. citizens. In addition, applicants who accept a conditional offer of employment may be subject to government security investigation(s) and must meet eligibility requirements for access to classified information.

By submitting your resume for this position, you understand and agree that L3Harris Technologies may share your resume, as well as any other related personal information or documentation you provide, with its subsidiaries and affiliated companies for the purpose of considering you for other available positions.

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