Supplier Development Engineer, Silicon (Starlink)

United States Digital Space LLC

Lockhart (TX)

On-site

USD 90,000 - 120,000

Full time

14 days+

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Job summary

United States Digital Space LLC in Bastrop, TX is seeking a Supplier Development Engineer, Silicon for Starlink to drive end-to-end supplier development across wafer fabrication, advanced packaging, and silicon test. You will engage suppliers early, set up high-volume programs, and coordinate with engineering teams to ensure material and process readiness.

The ideal candidate has strong experience across front-end wafer fabrication, back-end packaging, and silicon test, plus the ability to guide

Qualifications

  • Bachelor’s degree in an engineering discipline (EE, materials, or semiconductor physics).
  • 1+ year experience in silicon engineering (front-end fabrication, back-end packaging, or silicon test).

Responsibilities

  • Own end-to-end supplier development for silicon, wafer, and packaging portfolio.
  • Engage early with suppliers on selection, equipment, and process engineering for high-volume manufacturing.
  • Provide technology guidance on front-end node selection (7/5/3 nm) and back-end packaging technologies.
  • Assess supplier capabilities for wafer fabrication, packaging, and test readiness for high-volume silicon production.
  • Lead NPI activities, qualification, ramp, and reliability campaigns to enable full-rate manufacturing.
  • Create qualification plans covering front-end, back-end, and test with robust reliability testing.

Skills

Wafer fabrication
Back-end packaging
Silicon test
Node guidance
Root cause analysis

Education

Bachelor’s degree in engineering

Tools

Minitab
DOE

Job description

SUPPLIER DEVELOPMENT ENGINEER, SILICON (STARLINK)

the company was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today the company is actively developing the technologies to make this possible, with the ultimate goal ofenabling human life on Mars.

Starlink User Terminal business is experiencing exponential growth across consumer, retail, enterprise, and mobility applications. This rapid expansion requires a highly resilient and scalable supply chain for custom silicon, wafers, and advanced packaging.The role entails early engagement in supplier selection, equipment selection, and process engineering to set programs up for success in high-volume manufacturing by ensuring material and process corners are fully completed. The role also includes ownership to deliver on time, monitor field performance, react to issues, and feed lessons learned back to engineering teams for iterative improvement.

We are seeking a technically strong Supplier Development Engineer to drive end-to-end supplier development for the silicon and packaging portfolio — from strategic supplier selection and new product introduction through high-volume production scaling and reactive quality support. The ideal candidate will bring substantial industry experience across front-end wafer fabrication, back-end packaging and assembly, and silicon test, along with the ability to provide technology guidance on process nodes and packaging technologies. The Supplier Development Engineer, Silicon will be responsible for executing supplier strategies focused on wafer fabrication, advanced packaging, and silicon test. This position will have significant technical influence across Starlink engineering, quality, and supply chain teams.

RESPONSIBILITIES:
  • Own end-to-end supplier development for the silicon, wafer, and packaging portfolio within the Starlink User Terminal Bill of Materials, spanning strategic supplier selection, new product introduction, qualification, production ramp, and reactive quality support
  • Engage early with suppliers on selection, equipment selection, and process engineering to properly set up high-volume manufacturing programs by ensuring material and process corners are fully characterized and completed
  • Provide technology guidance to cross-functional teams on front-end process node selection such as 7 nanometer, 5 nanometer, and 3 nanometer complementary metal-oxide-semiconductor technologies, as well as back-end packaging technologies including flip-chip bumping, wafer-level packaging, fan-out, 2.5D and 3D integration, and system-in-package solutions
  • Assess supplier manufacturing capabilities across front-end and back-end processes, including wafer fabrication capacity, process stability, equipment suitability, process windows, yield learning, and overall technical readiness for high-volume silicon production including wafer fabrication, dicing, bumping, assembly, and packaging
  • Lead new product introduction activities, production part approval process, first article inspections, production rate ramps, and reliability campaigns to enable full-rate, high-volume manufacturing of wafers and packaged devices
  • Develop and execute robust qualification plans covering front-end, back-end, and test, including wafer-level reliability testing, package qualification, high temperature operating life testing, highly accelerated stress testing, thermal cycling, electromigration testing, and full silicon test coverage validation
  • Create and standardize qualification protocols across the silicon supply base, including equipment buy-off checklists, factory acceptance tests, site acceptance tests, and consistent reliability demonstration methods for both wafer foundries and outsourced semiconductor assembly and test suppliers
  • Drive supplier performance improvement through Lean methodologies, supplier scorecards, process audits, and systematic problem solving to deliver measurable gains in quality, cost, yield, and on-time delivery
  • Perform reactive quality engineering support, including rapid containment, root cause analysis using eight disciplines and five-whys methodologies, and corrective actions for quality escapes, field returns, and production issues
  • Own on-time delivery of qualification and production ramp activities while continuously monitoring field performance, reacting quickly to issues, and feeding lessons learned from field data back to design and process engineering teams for iterative product and process improvement
  • Partner closely with Silicon Design Engineering, Test Engineering, and Production teams to ensure supplier front-end, back-end, and test processes and manufacturing capability align with Starlink’s high-volume product requirements and performance goals
BASIC QUALIFICATIONS:
  • Bachelor’s degree in electrical engineering, materials science, semiconductor physics, or other engineering discipline
  • 1+ years of industry experience in silicon engineering (front-end wafer fabrication, back-end packaging and assembly, or silicon test)
PREFERRED SKILLS AND EXPERIENCES:
  • Strong technical background across the full silicon lifecycle including front-end process technology, back-end assembly and packaging, and test program development
  • Deep experience in front-end wafer fabrication including complementary metal-oxide-semiconductor process flows, photolithography, etching, deposition, and chemical mechanical polishing, with the ability to provide clear technology guidance on node selection
  • Strong back-end experience in packaging technologies including flip-chip, wafer-level packaging, fan-out, wire bonding, molding, and system-in-package integration, with proven ability to guide packaging technology roadmaps
  • Hands-on silicon test experience including wafer probing, automated test equipment test program development, scan and built-in self-test techniques, burn-in, and final test coverage optimization
  • Proven track record in strategic supplier selection and bringing up supply base through new product introduction for wafers and packaging at foundries and outsourced semiconductor assembly and test suppliers
  • Hands-on knowledge of high-volume semiconductor manufacturing processes with demonstrated understanding of manufacturing capability assessment including capacity analysis, process capability indices, process window validation, and yield ramp
  • Experience with production part approval process, advanced product quality planning, design failure mode and effects analysis, process failure mode and effects analysis, and first article inspection specifically for silicon wafers and packaged devices
  • Deep familiarity with relevant standards including Joint Electron Device Engineering Council, Automotive Electronics Council Q100, and AS9100 quality management system
  • Strong problem-solving skills using structured root cause analysis methods and statistical tools such as Minitab, Design of Experiments, and Six Sigma
  • Excellent written and verbal communication skills with the ability to distill complex technical topics into clear one-pagers and presentations
  • Demonstrated ability to influence cross-functional teams and suppliers in a fast-paced, high-growth environment
ADDITIONAL REQUIREMENTS:
  • Ability to travel up to 25% of the time, both domestically and internationally
  • Position may require extended working hours and occasional weekends to support production ramps and critical issue resolution
  • This position is based in Bastrop, TX and requires being onsite
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

the company is an Equal Opportunity Employer; employment with the company is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

Applicants wishing to view a copy of the company’s Aff…? Or applicants requiring reasonable accommodation to the application/interview process should reach out tohr@unitedstatesdigital.space.

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