Staff Test Engineering

Infineon Technologies AG; San Jose (CA); On-site; USD 118,000 - 162,000; Full time

Job summary

Infineon Technologies Americas Corp. in San Jose is seeking a Test Engineer to develop and debug 93K test programs for Automotive Ethernet PHY/Switch ICs and sensor bridges, driving test strategy and automotive-grade release criteria.

You will support silicon bring-up, bench-to-ATE correlation, DFT-based content (scan, MBIST/LBIST, JTAG, ATPG), and CP/FT flows, while optimizing test time and ensuring quality with cross‑functional teams.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline.
• 3–7 years of semiconductor test engineering experience with Advantest V93000 (93K) in a production environment.
• Hands-on experience delivering NPI test program development, debug, and production release (automotive strongly preferred).
• Strong understanding of DFT and pattern-based test: scan, at-speed scan, MBIST/LBIST, JTAG/boundary scan, ATPG execution and debug.
• Experience supporting CP (wafer sort) and/or FT (final test) flows including manufacturing ramp and correlation.
• Demonstrated problem-solving skills across parametric/functional debug, correlation, and HVM sustaining.
• Strong communication and documentation skills; effective cross-functional execution with Design/DFT/Product/Quality/Manufacturing stakeholders.

Responsibilities

• Develop and debug 93K test programs for Automotive Ethernet PHY/Switch ICs.
• Contribute to test strategy, test plans, guard banding, and production release criteria aligned to automotive quality requirements
• Support silicon bring-up, bench-to-ATE correlation, PLL/clock characterization, and PVT margin analysis
• Implement DFT -based test content: scan, at-speed scan, MBIST/LBIST, JTAG, and ATPG pattern execution
• Support yield improvement, false-fail reduction, test time optimization, and CP/FT correlation
• Assist with QUAL/ATEQ readiness, automotive quality documentation,and production change control
• Support RMA/customer return investigations and RCA/CAPA with FA and Quality teams
• Build reusable 93K test program frameworks and contribute to NPI process standardization

Skills

Semiconductor test engineering

Advantest V93000 (93K)

NPI test program development

DFT and pattern-based test

JTAG/boundary scan & ATPG

CP/FT test flows support

Cross-functional communication

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline

Tools

V93000 Debug Tools

Job description

WeAreIn for jobs that impact everyone's life. Join the thinkers, builders, and problemsolvers behind tomorrow’s technology.

Your Role Key responsibilities in your new role

• Develop and debug 93K test programs for Automotive Ethernet PHY/Switch ICs/Sensor bridge (100BASE-T1, 1000BASE-T1)
• Contribute to test strategy, test plans, guard banding, and production release criteria aligned to automotive quality requirements
• Support silicon bring-up, bench-to- ATE correlation, PLL/clock characterization, and PVT margin analysis
• Implement DFT -based test content: scan, at-speed scan, MBIST/LBIST, JTAG, and ATPG pattern execution
• Support yield improvement, false-fail reduction, test time optimization, and CP/FT correlation
• Assist with QUAL/ATEQ readiness, automotive quality documentation,and production change control
• Support RMA/customer return investigations and RCA/CAPA with FA and Quality teams
• Build reusable 93K test program frameworks and contribute to NPI process standardization

Your Profile Qualifications and skills to help you succeed

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related discipline.
• 3–7 years of semiconductor test engineering experience with A dvantest V93000 (93K) in a production environment
• Hands-on experience delivering NPI test program development, debug, and production release (automotive strongly preferred)
• Strong understanding of DFT and pattern-based test: scan, at-speed scan, MBIST/LBIST , JTAG/boundary scan, ATPG execution and debug
• Experience supporting CP (wafer sort) and/or FT (final test) flows including manufacturing ramp and correlation
• Demonstrated problem-solving skills across parametric/functional debug, correlation, and HVM sustaining
• Strong communication and documentation skills; effective cross-functional execution with Design/DFT/Product/Quality/Manufacturing stakeholders.

About Infineon

We are on a journey to create the best Infineon for everyone. This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills.

Infineon Technologies Americas Corp., is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, national origin, ancestry, citizenship, age, physical or mental disability, legally protected medical condition, family care status, military or veteran status, marital status, domestic partner status, sexual orientation, or any other basis protected by local, state, or federal laws. Employment at Infineon is contingent upon proof of your legal right to work in the United States under applicable law, verification of satisfactory references and successful completion of a background check and drug test, and signing all your on-boarding documents. In some instances, if applicable, U.S. export control laws require that Infineon obtain a U.S. government export license prior to releasing technologies to certain persons. This offer is contingent upon Infineon’s ability to satisfy these export control laws as related to your employment and anticipated job activities. The decision whether or not to submit and/or pursue an export license to satisfy this contingency, if applicable, shall be at Infineon’s sole discretion.

Infineon Technologies takes data privacy and identity theft very seriously. As such, we do not request personally-identifiable information (PII) from applicants over the internet or electronically. Please kindly refrain from disclosing your PII electronically during the application process or to unauthorized websites that may purport to be Infineon or any of our affiliates.

In the United States, it is required to disclose a salary range to applicants. The Wage range that the company expects to pay for a qualified candidate in the United States is: San Jose, CA- Minimum of $117,900 Salary per year/ Maximum of $162,100 Salary per year

In addition, all employees will be eligible to participate in an incentive plan.