Staff Silicon Validation Engineer

Marvell Technology; Santa Clara (CA); On-site; USD 102,000 - 155,000; Full time

Job summary

An innovative semiconductor company is seeking a Staff Silicon Validation Engineer to join their dynamic team. This role involves leading the initialization and debugging of high-speed SerDes and other internal IPs, collaborating across functions to ensure seamless SoC production. With a focus on product definition and innovation, you will contribute to cutting-edge technology that impacts industries and improves lives. If you are passionate about technology and eager to make a difference, this is the opportunity for you.

Benefits

Flexible Time Off

401k

Health Programs

Financial Wellbeing Programs

Bonuses

Equity

Holidays

Qualifications

• 3+ years in silicon validation or related area.
• Experience with analog IC design and high-speed I/O testing preferred.

Responsibilities

• Lead initialization, debugging, and characterization of internal IPs.
• Create validation test plans and automate testing with scripts.

Skills

Silicon Validation

Analog/Digital Circuits

Python

Technical Reporting

Education

Master's degree in Electrical/Electronic Engineering

Master's degree in Physics

Master's degree in Applied Science

Tools

HSpice

Cadence

Lab Equipment

Job description

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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud, AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can impact lives, industries, and the future of technology. We are a place to thrive, learn, and lead in purposeful innovation.

Your Team, Your Impact

Marvell's Central Engineering division develops high-speed SerDes (HSS) IPs for various applications. The Central System Engineering team validates these IPs in labs, supporting seamless SoC production across business units.

What You Can Expect

• Silicon Bring-Up and Debugging: Lead initialization, debugging, and characterization of Marvell's internal IPs, including High-Speed SerDes, PLL/DLL, and ADCs.
• Feature Evaluation and Firmware Development: Assess and debug PHY features, develop driver firmware, and analyze performance, especially for SAS and PCIe products.
• Cross-Functional Collaboration: Work with SoC, FAE, and ATE teams for testing and debugging.
• Test Plan Development and Automation: Create validation test plans, automate testing with scripts, and generate reports.
• Product Definition and Innovation: Contribute to defining new products and identifying niche opportunities.

What We're Looking For

• Master's degree in Electrical/Electronic Engineering, Physics, Applied Science, or related field.
• At least 3 years in silicon validation or related area.
• Technical skills: understanding of analog/digital circuits, Python proficiency, and ability to write technical reports.
• Preferred: experience with analog IC design, high-speed I/O testing, pre-silicon tools (HSpice, Cadence), and lab equipment.

Compensation and Benefits

Base pay: $102,880 - $154,100/year, determined by skills and experience.

Additional benefits include bonuses, equity, health and financial wellbeing programs, flexible time off, 401k, holidays, and more.

Additional Information

Marvell provides equal employment opportunities and accommodations for applicants with disabilities.

Job Details

• Seniority level: Associate
• Employment type: Full-time
• Job function: Quality Assurance
• Industry: Semiconductor Manufacturing