Staff RTL Engineer

Microvision

Orlando (FL)

On-site

USD 100,000 - 130,000

Full time

14 days+

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Benefits offered by this job

Competitive compensation
Healthcare options
401(k) with company match
Flexible vacation program
Parental Leave
Company-paid life insurance

Job summary

A leading perception solutions provider is seeking a Staff RTL Engineer in Orlando, Florida. You will be a part of the Digital Design Engineering team, focusing on designing and producing automotive LiDAR products. The ideal candidate has extensive experience in FPGA design, including System Verilog and Verilog. This role includes mentoring, integration of developed features, and participating in the full software development life cycle. The position offers a flexible work schedule, including hybrid working arrangements.

Qualifications

  • 7+ years of experience in FPGA design.
  • Expertise in integrating and bringing up features in hardware.
  • Experience with UVM/OVM and constrained random testing.

Responsibilities

  • Design and implement RTL features based on system architecture.
  • Document and execute test and implementation plans.
  • Coach and mentor junior team members.

Skills

System Verilog
Verilog
Python
FPGA Design
Configuration Management
HDL Synthesis/Simulation
Digital Electronics
Analog Electronics

Education

BS in Electrical Engineering or related field

Tools

Git
Subversion
Jira

Job description

About Us: With offices in the U.S. and Germany, MicroVision is at the forefront of driving the global adoption of innovative perception solutions, with the goal of making mobility and autonomy safer. Our engineering excellence, based in Florida, Washington State, Washington D.C., Hamburg, Germany and Orlando, FLorida, enables us to develop and supply integrated lidar hardware and perception software solutions. Our proprietary technologies enhance safety and automation across various industrial applications, including robotics, automated warehouses, and agriculture, and are instrumental in the development of autonomous systems. MicroVision’s core technology, initially developed for the automotive industry, continues to accelerate advanced driver-assistance systems (ADAS) and autonomous driving. Building on our history of providing technology to the military segment, our target offerings include semi- and fully autonomous airborne and terrestrial sensor systems. With our solid-state lidar technologies, encompassing MEMS-based long-range lidar and flash-based short-range lidar, integrated with our onboard perception software, MicroVision possesses the expertise to deliver safe mobility at the speed of life.

Job Summary: MicroVision has an immediate opportunity for a Staff RTL Engineer. As a key member of MicroVision's growing Digital Design Engineering team, you will collaborate with various technical teams in the company to design and take into production, market defining Automotive LiDAR product. The right candidate for this position will be a highly motivated FPGA/RTL Engineer with a breadth of understanding in FPGA design and best practices, including detailed design, System Verilog coding, modelling, simulation, verification, integration and test.

Essential Duties and Responsibilities
  • Derive FPGA requirements based on system requirements then create FPGA architecture to fulfill those requirements
  • Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements
  • Own the detailed design of assigned firmware components and subsystem functionality
  • Document test and implementation plans at unit and system levels and then execute on them
  • Work with other teams to integrate developed features into system hardware
  • Support bringing up RTL features developed by the team
  • Coach/mentor junior members of RTL and integration teams to complete tasks
  • Participate in the full software development life cycle (SDLC) flow including peer reviews of requirements, architecture, design, and code implementations within an approved ASPICE development flow
Required Knowledge, Skills and Abilities
  • Knowledge of System Verilog, Verilog, Python programming languages
  • Proficient in FPGA Design methodologies from state machine design to DSP implementation
  • Experienced in closing timing in FPGA designs
  • Mapping algorithms to FPGA appropriate logic implementations
  • Expert integrating and bringing up features in hardware
  • Ability to work well in a fast-moving and complex environment
  • Independently driven to complete project tasks
  • Experience with Configuration Management and Change Control concepts and tools (Git, Subversion, Jira, etc.)
  • Experience working with Functional Requirements and defining Requirement Based Tests
  • Experience performing HDL Synthesis/Simulation (e.g., VCS, Synplicity, etc.)
  • Experience with design analyses (Timing, Lint, Clock Domain Crossings, Code Coverage, etc.) and IP compliance strategies
  • Experience designing portable, scalable Test Benches
  • Experience with UVM/OVM – Constrained random testing
  • Familiarity with hierarchical simulation and verification frameworks
  • Experience with intersystem communication protocols (I2C, UART, SPI, etc.)
  • Familiarity with microcontroller peripherals including one or more of the following: ADCs, DACs, Flash, EEPROM, timers and watchdogs
  • Working knowledge of data structures and algorithm fundamentals
  • Working knowledge of digital and analog electronics
Preferred Knowledge, Skills, and Abilities
  • Knowledgeable of control systems and digital signal processing fundamentals
  • Proficient in other embedded software systems developed in C/C++/etc.
  • Hands‑on experience with High‑Level Synthesis (HLS)
  • Excellent scripting and automation skills. Bash shell, python, Make/CMake, and TCL desired
  • Extensive project experience working on embedded laser applications including Lidar
  • Safety‑critical industry experience. (FIT analysis, etc.)
  • Working knowledge of various computing architectures beyond FPGAs, such as DSPs, GPUs, or MCUs, and their associated hardware computing platforms used to program them
  • Experience with ASIC design & migration from FPGA prototypes to production ASICs
Required Education and Experience
  • BS in Electrical Engineering or related field and 7+ years of experience or equivalent combination of education and experience

MicroVision offers flexible work schedule that could include a hybrid schedule of onsite and remote work subject to team and business needs. You must live and reside within commuting distance from MicroVision's office in Orlando, FL.

We are not able to provide visa sponsorship for this position. You must be able to work in the US without sponsorship.

Benefits
  • Competitive compensation and equity program
  • Choice between an HSA Medical plan or a Buy‑Up PPO Medical plan
  • Dental plan 100% employer‑paid for employees
  • Vision coverage 100% employer‑paid for employees
  • 401(k) plan with company match to help you save for your future (50% of your contributions up to the first 6% of your eligible pay)
  • Generous time‑off package including a flexible vacation program as well as incidental personal/sick days and floating holidays
  • Supplemental pay for Parental Leave
  • Company‑paid basic life and AD&D insurance and long‑term disability

MicroVision is committed to an inclusive workplace. MicroVision is an equal‑opportunity employer and does not discriminate on the basis of race, creed, color, religion, national origin, sex, age, disability, marital status, sexual orientation, status as a disabled veteran or Vietnam‑era veteran or any other basis prohibited by local, state or federal law. Please let us know if you need reasonable accommodation in completing the application, attending and/or participating in an interview or intaking any test required for employment.

MicroVision is an E‑Verify participant. We will provide the Social Security Administration, and if necessary, the Department of Homeland Security, with information from each new employee’s Form I‑9 to confirm work authorization. Please note that we do not use this information to pre‑screen job applicants.

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