Staff FPGA Engineer, EW

Slope; Costa Mesa (CA); On-site; USD 220,000 - 292,000; Full time

Benefits offered by this job

Equity grants

Top-tier benefits

Job summary

Anduril Industries in Costa Mesa, CA is seeking a Staff FPGA Engineer to lead end-to-end design and verification on the latest AMD/Xilinx SOC/FPGA platforms for software defined radios used in EW systems.

You will collaborate with hardware, software, and RF teams, own HDL development in VHDL/Verilog, and drive robust design processes while aiming for mission-ready, secure electronics for U.S. military applications.

Qualifications

• Strong DSP experience for embedded devices or software defined radios.
• Proficient with Xilinx/AMD SOCs/FPGA architectures and bring-up processes.
• Experience with high-speed digital interfaces (PCIe, JESD, Aurora, etc.).
• HDL design experience using VHDL/Verilog in Linux environments.
• Git and CI/CD workflows experience; security clearance eligibility.

Responsibilities

• Own FPGA development for software defined radio platforms enabling EW functions.
• Collaborate with software and electrical engineers to bring up boards.
• Design and test VHDL DSP modules and related infrastructure.
• Integrate subsystems into the FPGA core and resolve timing/contention issues.
• Develop drivers for RF component boards (PLLs, front ends, etc.).
• Manage deliverables, document progress, and communicate results.

Skills

DSP implementation

Xilinx/AMD FPGA

High-speed interfaces

VHDL/Verilog

Linux

Git/CI/CD

Security clearance

Mentoring/leadership

Communication

Job description

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century’s most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril’s family of systems is powered by Lattice OS, an AI‑powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting‑edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years.

ABOUT THE TEAM

The Electronic Warfare (EW) team is responsible for developing high‑reliability radios, embedded processing, and power systems for software defined radio platforms. Working across hardware, software, and mission autonomy, the team delivers EW‑critical electronics, PCB assemblies, and FPGA‑based processing architectures that enable Anduril's next‑generation autonomous electronic warfare platforms to operate in complex and contested environments. EW Electrical Engineers drive end‑to‑end development, from system architecture and circuit design to verification, integration, and test, ensuring scalable, mission‑ready solutions that meet the performance, reliability, and survivability demands of the U.S. Military and modern EW warfare.

ABOUT THE JOB

We are looking for a Staff FPGA Engineer to join our rapidly growing team in Costa Mesa, CA. In this role, you will be responsible for the end‑to‑end design and verification of projects on the latest AMD/Xilinx SOC/FPGA platforms and helping to establish robust design processes. This will require expertise in HDL languages, FPGA architecture, and AMD/Xilinx development workflow. If you are someone who is ready to own and lead rapid software defined radio development, then this role is for you.

WHAT YOU'LL DO

• Own FPGA development for various software defined radio platforms that enable EW functions
• Work with software, and electrical, engineers to bring up state of the art boards for software defined radios
• Responsible for design and test of VHDL DSP modules and infrastructure
• Integrate subsystem/module into larger FPGA core; solve resource and timing contentions as they arrive
• Develop drivers for custom RF component boards (PLLs, mixed signal front ends, etc)
• Manage project deliverables against timeline; effectively document and communicate

REQUIRED QUALIFICATIONS

• Strong experience with DSP implementation for embedded devices and/or software defined radios
• Experience with Xilinx/AMD SOC/FPGAs; knowledgeable of architecture
• Experience with bring‑up of high speed digital interfaces (PCIE, JESD, Aurora, N‑Gbps Optical, etc)
• Proficient in HDL design using VHDL and/or Verilog
• Proficiency in a Linux development environment
• Proficiency using Git and CI/CD workflows (Git, TCL, CI/HITL)
• Eligible to obtain and maintain an active U.S. Secret security clearance
• Experience mentoring/leading 1‑3 engineers through larger design tasks
• You are a self starter, outcome driven, and an excellent communicator

PREFERRED QUALIFICATIONS

• Experience working with the latest AMD SOC/FPGAs
• Knowledge of AMD FPGA NOC and advanced design features (partial reconfiguration, DFX, segmented flow, …)
• Working knowledge of signal processing flows (data converter to bits)
• Exposure to wireless communications and/or radar systems design
• Experience with RF test equipment (Spec An, Sig Gens, Oscilloscope, etc)
• Knowledge or experience using AMD AIE tiles for processing

Salary Range

$220,000 — $292,000 USD

The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are included in the majority of full‑time offers; and are considered part of Anduril's total compensation package. Additionally, Anduril offers top‑tier benefits for full‑time employees, including:

Benefits

At Anduril, we invest in our people. Our comprehensive, competitive benefits package (available at little to no cost to employees) ensures you’re supported in health, recovery, and whatever comes next. For more information, Explore Our Benefits.