Staff Design Verification Engineer

Renesas Electronics Corporation

Duluth (GA)

On-site

USD 120,000 - 190,000

Full time

4 days ago
Be an early applicant
Application generator

Turn this role into an interview — a resume and cover letter built around what this employer wants.

Get past ATS filters

Benefits offered by this job

Medical benefits
Dental & Vision insurance
Paid time off

Job summary

Renesas Electronics Corporation invites an experienced Staff Design Verification Engineer to join our memory interface team. You will verify DDR6 and future generations, develop UVM-based verification environments, and drive coverage and quality for high-speed memory blocks.

Ideal candidates have 8+ years in semiconductor design verification, SystemVerilog expertise, and strong problem-solving skills. This role collaborates with design and software teams to deliver robust, verifiable memory

Qualifications

  • 8+ years of semiconductor design verification experience.
  • Strong proficiency with SystemVerilog and hands-on experience using UVM.
  • Experience with verification planning, functional verification, coverage, checkers, test development, and debugging.

Responsibilities

  • Drive verification activities for complex digital designs at the block and system level.
  • Develop and execute verification plans based on functional and performance specifications.
  • Develop, maintain, and optimize SystemVerilog/UVM verification environments and testbenches.
  • Develop verification tests, functional coverage, checkers, and other verification components.
  • Take ownership of verification environments and verification execution for assigned blocks and features.
  • Drive and monitor coverage to ensure verification goals are achieved.
  • Work closely with design engineers to ensure designs meet requirements and are effectively verifiable.
  • Analyze verification results, debug failures, and identify functional or design issues.

Skills

SystemVerilog
UVM
Memory interface design

Education

Bachelor's or Master's in Electrical / Computer Engineering / Computer Science

Tools

UVM (Universal Verification Methodology)

Job description

Renesas is looking for an experienced Staff Design Verification Engineer to join our team developing leading-edge memory interface products for data center, AI, and cloud computing applications. These products enable high-bandwidth, power-efficient memory solutions for intensive computing environments.

This role will contribute to the verification of advanced memory data buffer products, including DDR6 and future generations. The ideal candidate brings strong semiconductor design verification experience with SystemVerilog and UVM. Previous DDR or memory experience is an advantage, but is not required.

Key Responsibilities
  • Drive verification activities for complex digital designs at the block and system level.
  • Develop and execute verification plans based on functional and performance specifications.
  • Develop, maintain, and optimize SystemVerilog/UVM verification environments and testbenches.
  • Develop verification tests, functional coverage, checkers, and other verification components.
  • Take ownership of verification environments and verification execution for assigned blocks and features.
  • Drive and monitor coverage to ensure verification goals are achieved.
  • Work closely with design engineers to ensure designs meet requirements and are effectively verifiable.
  • Analyze verification results, debug failures, and identify functional or design issues.
  • Develop efficient, reusable verification environments and methodologies with a focus on quality, performance, and ease of use.
  • Identify and implement improvements to verification processes, methodologies, and design behavior.
  • Participate in feasibility studies and technical reviews.
  • Serve as a technical resource within the team, providing guidance on complex verification problems and sharing best practices.
  • Communicate verification status, risks, and results to project stakeholders.
Qualifications
  • Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent experience.
  • 8+ years of related experience in semiconductor design verification.
  • Strong experience in semiconductor design verification.
  • Strong proficiency with SystemVerilog and hands-on experience using UVM (Universal Verification Methodology).
  • Experience developing and debugging UVM-based verification environments and testbenches.
  • Experience with verification planning, functional verification, coverage, checkers, test development, and debugging.
  • Ability to independently own complex verification assignments and determine appropriate verification approaches.
  • Strong analytical and problem-solving skills.
Preferred Qualifications
  • Experience with DDR4, DDR5, memory interfaces, data buffers, or other high-speed memory technologies.
  • Experience improving verification methodologies, efficiency, or reuse.
  • Experience serving as a technical resource or mentoring other engineers.
Additional Information

Renesas offers a full range of elective benefits including medical, health savings account (with applicable medical plan), dental, vision, health and/or dependent care flexible spending accounts, pre-tax commuter benefits, life insurance, AD&D, and pet insurance. In addition to elective benefit options, benefited employees receive company-paid life insurance and AD&D, LTD, short term medical benefits as well as paid sick time, paid holidays, and accrued paid vacation. New employees will attend a detailed benefit orientation to learn more about our many benefits and resources.

Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier. With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world-leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future.

At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives.

We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process.

Are you ready to join our team and shape the future with us?

Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement.

Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

Staff Design Verification Engineer
Staff Design Verification Engineer

SmartRecruiters, Inc. • Duluth (GA)

On-site
USD 120,000 - 180,000
Medical benefits
Dental & vision
Paid time off
+1
Senior Staff Design Verification Engineer
Senior Staff Design Verification Engineer

SmartRecruiters, Inc. • Duluth (GA)

On-site
USD 150,000 - 190,000
Health insurance
Dental & Vision
401(k) plan
+2
Senior Staff Design Verification Engineer
Senior Staff Design Verification Engineer

Renesas Electronics Corporation • Duluth (GA)

On-site
USD 150,000 - 190,000
Medical benefits
Dental and vision
401(k) match
+2
Principal Design Verification Engineer
Principal Design Verification Engineer

SmartRecruiters, Inc. • Plano (TX)

On-site
USD 140,000 - 210,000
Principal Design Verification Engineer
Principal Design Verification Engineer

SmartRecruiters, Inc. • Chandler (AZ)

On-site
USD 150,000 - 190,000
Principal Design Verification Engineer
Principal Design Verification Engineer

SmartRecruiters, Inc. • San Jose (CA)

On-site
USD 198,000 - 248,000
Principal Design Verification Engineer
Principal Design Verification Engineer

Renesas Electronics Corp. • California (MO)

On-site
USD 140,000 - 210,000
Principal Design Verification Engineer
Principal Design Verification Engineer

Renesas Electronics Corp. • Georgia

On-site
USD 140,000 - 200,000
Principal Design Verification Engineer
Principal Design Verification Engineer

Renesas Electronics Corp. • Arizona

On-site
USD 130,000 - 170,000
Principal Design Verification Engineer
Principal Design Verification Engineer

Renesas Electronics Corp. • Town of Texas (WI)

On-site
USD 120,000 - 160,000