Staff Design Engineer, IC Layout

Impinj

Seattle (WA)

On-site

USD 136,000 - 204,000

Full time

6 days ago
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Benefits offered by this job

Healthcare benefits
401(k) with company match
Stock options
Remote work support

Job summary

Impinj, Inc. in Seattle is seeking a senior Layout Design Engineer to join the Silicon Engineering group.

You will perform transistor‑level layout of RF, mixed‑signal, and analog blocks for high‑performance RF and ultra‑low‑power RFID, collaborating with analog and digital teams on floorplanning and power distribution. You will review layouts for EM, matching, signal integrity, and participate in schedule meetings.

Qualifications

  • Bachelor’s degree in computer or electrical engineering.
  • 8+ years of experience in layout design for RF, analog and mixed-signal blocks.
  • Proficiency with Cadence Virtuoso and layout verification tools.

Responsibilities

  • Perform detailed transistor-level layout of RF, mixed-signal, and analog circuit blocks for both high-performance RF as well as ultra-low power and compact RFID
  • Work closely with the analog and digital design teams on floor planning, pin placement, power supply strategy and signal distribution between blocks
  • Conduct layout reviews for power/ground routing, electromigration, matching, and signal coupling
  • Participate in schedule meetings coordinating layout and floorplan activities

Skills

Analog layout
RF layout
Mixed-signal layout
Cadence Virtuoso
Cadence/Siemens DRC/LVS
Guard rings
Parasitic management
Signal integrity
EM/EMIR awareness
Team collaboration

Education

Bachelor’s degree in computer or electrical engineering

Tools

Cadence Virtuoso layout editor
Cadence/Siemens Calibre DRC/LVS
PVS
Siemens Calibre LVS

Job description

Impinj delivers the Physical Intelligence that connects the physical world to the AI-powered digital world, fueling automated workflows and improving consumer experiences. From retail merchandise and groceries to packages and shipping pallets, Impinj products and solutions identify and track tens of billions of everyday items, providing real-time operational insights about every item enterprises make, move and sell. We are, quite literally, the eyes and ears of smart enterprise systems. Come help us build technology and solutions that enable businesses to visualize everything, waste nothing and act instantly.

Team Overview:

The Layout Design Engineering group is an integral part of the Silicon Engineering department, working closely with the analog RFID end-point IC development team and the Reader IC team, internationally. The team is responsible for delivering tape-outs for RFID products, test chips, reader ICs, and DOEs (design of experiments) work that sits at the center of how Impinj brings new silicon to market. Layout decisions made by this team directly influence the power efficiency, cost, and time-to-market of every piece of silicon we ship, making the group's work foundational to Impinj's mission. The team operates with a continuous-improvement mindset, adapting quickly and challenging each other to remain best-in-class in both quality and speed, with meticulous attention to detail to ensure designs have long-term reliability and zero defects, at production volumes in the many billions and eventually trillions of tags per year.

What You Will Do:
  • Perform detailed transistor-level layout of RF, mixed-signal, and analog circuit blocks for both high-performance RF as well as ultra-low power and compact RFID
  • Work closely with the analog and digital design teams on floor planning, pin placement, power supply strategy and signal distribution between blocks
  • Conduct layout reviews for power/ground routing, electromigration, matching, and signal coupling
  • Participate in schedule meetings coordinating layout and floorplan activities
What You Will Bring:
  • Bachelor’s degree in computer or electrical engineering and 8+ years of experience
  • Experience in custom analog, RF, and mixed-signal layout
  • Ability to collaborate with other layout engineers on the top-level IC floorplan, partnering with circuit designers to resolve complex problems
  • Understanding of semiconductor manufacturing processes and foundry technologies across advanced process nodes down to 16nm for ultra-low-power and high-fidelity applications
  • Knowledge of analog layout challenges and layout-dependent effects in advanced processes — noise coupling, matching, parasitics, LOD, WPE, PSE, and coloring — along with proficiency in mitigation techniques such as guard rings, DNW, PN junctions, parasitic management, signal integrity, reliability (EMIR), and ESD
  • Proficiency with the use of Cadence Virtuoso layout editor and Cadence/Siemens layout verification tools (including PVS and Siemens Calibre DRC/LVS). Ability to interpret and correct ERC, DRC and LVS error reports
  • Excellent communication and collaboration skills
  • Strong technical project management skills

The benefits listed below may vary depending on the nature of your employment with Impinj and the country where you work.

The typical base pay range for this role across the US is $136,000 - $204,000. Individual base pay depends on various factors such as complexity and responsibility of role, job duties, requirements, and relevant experience and skills. Both market wage data and the mid-point of the pay range is reviewed and used as the starting point for all new hire offers. Offers are made within the base pay range applicable at the time. At Impinj certain roles are eligible for additional rewards, including merit increases, annual bonus and stock. These awards are allocated based on individual performance. In addition, certain roles also have the opportunity to earn sales incentives based on revenue or utilization, depending on the terms of the plan and the employee’s role. US based employees have access to healthcare benefits; a 401(k) plan and company match among others.

For a more comprehensive list of US employment benefits, click here .

US Export Controls:

This position has access to technologies or data subject to U.S. export control regulations. Under these laws, the release or transfer of export-controlled items or information to individuals who are not classified as "U.S. persons" (as defined by Immigration & Nationality Act) may require prior authorization from the U.S. government. We may require additional documentation related to national identity to determine whether an export compliance license is required for any export-controlled items. This information is requested solely for the purpose of complying with U.S. export control laws and will not be used for other purposes. Learn more about export compliance here .

Why work at Impinj:

Know you’re making a difference. Competitive benefits. Support for remote work or a desk with a view. Weekly Q&A sessions with our executive team. Impinj provides an environment that fosters openness and innovation and is developing technology that delivers a positive impact on the world. Collaboration and teamwork are highly valued, and accomplishments are duly celebrated. We have an open paid time-off policy paired with a respect for work/life balance. Our headquarters is located in Seattle with spectacular views of the Olympics, Lake Union, and Mt Baker, which can be enjoyed from our rooftop deck. Our Brazilian site is in Porto Alegre, Rio Grande do Sul state, at “Tecnopuc,” a technology park that offers a very nice workplace for the development of groundbreaking technologies. Impinj is committed to creating a diverse and inclusive work environment and welcomes applicants from all backgrounds.

We are an equal opportunity employer and do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status. We will ensure that individuals with disabilities are provided reasonable accommodation to participate in the job application or interview process, to perform essential job functions, and to receive other benefits and privileges of employment. Please contact us to request accommodation.

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