Staff Engineer, Compiler

Conductor; San Jose (CA); On-site; USD 163,000 - 253,000; Full time

Benefits offered by this job

Charitable giving match

4+ weeks paid time off

Flexible work policy

Emotional wellness support

Onsite café and gym

Job summary

Conductor is seeking a highly experienced professional to join our AGI Computing Lab in San Jose, CA. The role focuses on adapting existing compilers and building kernel DSLs to enhance performance for future AI/ML workloads.

The ideal candidate will hold a relevant degree, have extensive experience with languages and compilers, and contribute to open-source projects. This position requires onsite collaboration to innovate scalable solutions for complex system demands.

Qualifications

• 10+ years of industry experience with a Bachelor’s, 8+ with a Master’s, or 5+ with a PhD.
• Experience in Triton, Helion, MLIR, XLA, or similar.
• Experience in kernel DSL or non-trivial language-level changes.

Responsibilities

• Adapting torch.compile to backend specifications.
• Building or extending kernel DSLs for hardware deployment.
• Designing placement and scheduling passes for tensor data.

Skills

Triton

Helion

MLIR

XLA

TVM

Inductor

IREE

CUTLASS

Education

Bachelor’s degree with 10+ years of experience

Master’s degree with 8+ years of experience

PhD with 5+ years of experience

Tools

PyTorch

Triton

LLVM

MLIR

Job description

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.

Advancing the World’s Technology Together

Our technology solutions power the tools you use every day— including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future.

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities.

The AGI (Artificial General Intelligence) Computing Lab is dedicated to solving the complex system-level challenges posed by the growing demands of future AI/ML workloads. Our team is committed to designing and developing scalable platforms that can effectively handle the computational and memory requirements of these workloads while minimizing energy consumption and maximizing performance. To achieve this goal, we collaborate closely with both hardware and software engineers to identify and address the unique challenges posed by AI/ML workloads and to explore new computing abstractions that can provide a better balance between the hardware and software components of our systems. Additionally, we continuously conduct research and development in emerging technologies and trends across memory, computing, interconnect, and AI/ML, ensuring that our platforms are always equipped to handle the most demanding workloads of the future. By working together as a dedicated and passionate team, we aim to revolutionize the way AI/ML applications are deployed and executed, ultimately contributing to the advancement of AGI in an affordable and sustainable manner. Join us in our passion to shape the future of computing!

Location: Daily onsite presence at our San Jose, CA office / U.S. headquarters in alignment with our Flexible Work policy.

What You’ll Do

• Adapting torch.compile to our backend: lowering Inductor's IR to our hardware, defining what gets fused, what gets specialized, and where the compiler should yield to hand‑written kernels.
• Building or extending kernel DSLs for our hardware: taking a tile‑based programming model (Triton‑style), a higher‑level expression (Helion‑style), or a custom DSL we design, and lowering it to our ISA, our memory hierarchy, and our collective primitives.
• Designing placement and scheduling passes: given a graph and our distributed memory model, deciding where tensors live, when to migrate them, and how to overlap compute with data movement.
• Implementing parallelism‑aware lowering: making tensor, pipeline, expert, and sequence parallelism first‑class in the compiler IR rather than bolted on at the framework layer.
• Fusion, tiling, and memory planning: the classical compiler problems, reframed for a non‑uniform memory hierarchy where the right tile size and the right placement are coupled decisions.
• Upstream contributions: where we use open‑source DSLs, we want our work to land upstream rather than live in a private fork. You'll engage with upstream review processes for PyTorch, Triton, Helion, and adjacent projects.

What You Bring

• Bachelor’s with 10+ years, or Master’s with 8+ years, or PhD's with 5+ years of industry experience.
• 3‑5+ years of industry experience in at least one of: Triton, Helion, MLIR, XLA, TVM, Inductor, IREE, CUTLASS, or a proprietary equivalent (More experienced candidates will also be considered at relevant levels).
• Experience designing a kernel DSL or its IR from scratch, or making non‑trivial language‑level changes to an existing one.
• Experience with MLIR — writing dialects, passes, or backend integration.
• Experience building PyTorch backends for non‑CUDA accelerators (XPU, ROCm, MPS, TPU, custom).
• Experience with kernel autotuning, performance modeling, or cost‑based compilation.
• Background in HPC, distributed systems, or NUMA‑aware programming — anything that built intuition for non‑flat memory.
• Open‑source contributions to PyTorch, Triton, Helion, LLVM/MLIR, or similar projects is a big plus.

What We Offer

Pay Range: $163,000 - $253,000 USD.

Incentive Opportunities: The pay within this range varies by work location and may also depend on job‑related knowledge, skills, and experience.

Benefits:

• Give Back – With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community.
• Enjoy Time Away – You’ll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge.
• Care for Family – Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, medical travel support, and virtual vet care for your fur babies.
• Prioritize Emotional Wellness – With on‑demand apps and free confidential therapy sessions, you’ll have support no matter where you are.
• Stay Fit – Eating well and being active are important parts of a healthy life. Our onsite café and gym, plus virtual classes, make it easier.
• Embrace Flexibility – Benefits are best when you have the space to use them. That’s why we facilitate a flexible environment so you can find the right balance for you.

Equal Opportunity Employment Policy

Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.

When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long‑term conditions, neurodivergent individuals, or those requiring pregnancy‑related support. All candidates scheduled for an interview will receive guidance on requesting accommodations.

Our Commitment to Innovation and Fairness

At Samsung Semiconductor, we use Artificial Intelligence (AI) tools in the recruitment process to enhance efficiency. However, AI is used as a support tool, not a final decision‑maker. All hiring decisions are made by our human recruiting team and hiring managers to ensure every candidate is evaluated fairly and holistically.

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At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we prohibit the use of generative AI tools to misrepresent a candidate's true skills and qualifications. Permitted uses are limited to basic preparation, grammar, and research, but all submitted content and interview responses must reflect the candidate’s genuine abilities and experience. Violation of this policy may result in immediate disqualification from the hiring process.

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Applicant Privacy Policy
https://semiconductor.samsung.com/about-us/careers/us/privacy/

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