Staff BIOS/Platform System Engineer

Monolithic Power Systems Inc.; San Jose (CA); On-site; USD 120,000 - 150,000; Full time

Benefits offered by this job

Competitive salary

Comprehensive health, dental, and vision benefits

401(K) with company match

Paid holidays and PTO

Flexible work arrangements

Job summary

Monolithic Power Systems Inc. is looking for a Senior BIOS Engineer based in San Jose, California. This role focuses on analyzing and customizing BIOS/UEFI firmware for various architectures, closely collaborating with Systems Engineers and leading validation efforts for new hardware platforms.

The ideal candidate will have a strong background in firmware development, experience across multiple CPU architectures, and excellent problem-solving skills. Competitive salary and comprehensive benefits are offered for this position.

Qualifications

• Bachelor’s degree required.
• 3+ years of BIOS/UEFI experience.
• Experience with AMD, Intel, or ARM architectures.

Responsibilities

• Analyze and customize BIOS/UEFI firmware.
• Collaborate with Systems Engineers for validation.
• Lead BIOS-level bring-up for new hardware platforms.

Skills

BIOS/UEFI Firmware Development

C/C++ Programming

Scripting (Python, Bash)

DDR5 Memory Architecture

Analytical Problem-Solving

Technical Documentation

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science or a closely related field

Tools

JTAG Debuggers

Oscilloscopes

Protocol Analyzers

Job description

Overview

Monolithic Power Systems, Inc. (MPS) is a leading company in the Semiconductor industry, specializing in Integrated Power Semiconductors and Systems Power delivery architectures. We cultivate creativity, sustainability, and innovation.

Job Description

We are seeking a skilled and motivated Senior BIOS Engineer to join our system engineering team.

Key Responsibilities

• Analyze, troubleshoot, and customize BIOS/UEFI firmware for platforms using AMD EPYC/Ryzen, Intel Core/Xeon, and ARM-based processors.
• Collaborate closely with Systems Engineers to troubleshoot and validate subsystems and components across the full platform stack.
• Lead BIOS-level bring-up and validation for new hardware platforms, including debugging CPU, chipset, and DDR5 memory subsystems.
• Analyze and resolve hardware-firmware interface issues including POST failures, memory training errors, PCIe enumeration problems, and thermal/power sequencing anomalies.
• Configure and validate DDR5 memory subsystems, including SPD/XMP programming, memory training tuning, RAS features, and JEDEC compliance.
• Develop and execute validation test plans for BIOS features, power management (ACPI/S-states), security features (Secure Boot, TPM, AMD PSP, Intel TXT/SGX), and boot flows.
• Work with CPU vendors to ensure the adoption of certain BIOS customizations.
• Debug using tools such as JTAG/ITP debuggers, logic analyzers, oscilloscopes, and serial console output.
• Author and maintain issue logs, validation reports, debug guides, and internal technical documentation.
• Participate in design reviews, hardware bring-up planning, and cross-functional meetings.
• Support manufacturing and sustaining engineering with BIOS customization, factory programming, and field issue resolution.

Required Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a closely related field.
• 3+ years of hands-on experience in BIOS/UEFI firmware development or validation.
• Experience with at least two of the following CPU architectures: AMD (AGESA, EPYC/Ryzen), Intel (FSP, Core/Xeon), or ARM (TF-A, EDK2).
• Strong understanding of DDR5 memory architecture, training algorithms, SPD/MR registers, and RAS features.
• Proficiency in C/C++ and scripting languages (Python, Bash) for firmware development and automation.
• Experience with UEFI/EDK2 framework, SMM, DXE, PEI driver development, and ACPI/ASL.
• Familiarity with hardware debug tools: JTAG debuggers (Intel ITP, Lauterbach), protocol analyzers, oscilloscopes, and serial console interfaces.
• Solid understanding of platform buses and interfaces: PCIe, USB, I2C/SMBus, SPI, LPC, UART, and GPIO.
• Experience reading and interpreting hardware schematics, datasheets, and silicon vendor documentation.
• Excellent analytical and problem-solving skills, ability to work across hardware and software boundaries.
• Strong written and verbal communication skills; experience authoring technical documentation.

Preferred Qualifications

• Experience with AMD PSP, Intel ME/CSME, or ARM TrustZone security subsystems.
• Familiarity with BMC firmware (OpenBMC) and IPMI/Redfish management interfaces.
• Knowledge of server platform RAS features: DRAM ECC, memory mirroring, patrol scrub, and machine check architecture (MCA).
• Exposure to PCIe Gen 5 or CXL 2.0/3.0 interconnect validation.
• Hands-on experience with JEDEC DDR5 compliance testing and memory timing optimization.
• Understanding of power management frameworks: ACPI, AMD STAPM, Intel DPTF, and platform telemetry.
• Prior collaboration with silicon vendors (AMD, Intel, Arm Ltd.) on pre-silicon or early-silicon bring-up.
• Experience with version control systems (Git), CI/CD pipelines, and agile engineering workflows.

Work Environment & Collaboration

The role requires close day-to-day collaboration with Systems Engineers, Hardware Engineers, and Design/Applications Engineers in a fast-paced lab environment. You will have access to pre-production hardware, silicon support, and a dedicated debug lab. Occasional travel to vendor or customer sites may be required.

Benefits

Competitive salary and equity compensation. Comprehensive health, dental, and vision benefits. 401(K) with company match, Employee Stock Purchase Program (ESPP), paid holidays and PTO. Flexible work arrangements and professional development support.

Equal Opportunity Employer

Monolithic Power Systems, Inc. is an Equal Opportunity Employer and embraces diversity in our employee population. We provide equal opportunity to all qualified applicants and employees regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, age, disability, protected veteran status or other legally protected status.