STA - CAD Engineer

Advanced Micro Devices, Inc.; Austin (TX); On-site; USD 120,000 - 180,000; Full time

Job summary

AMD in Austin, TX is seeking a timing analysis engineer to join the CAD Methodology team. You will develop and deploy timing methodologies for next generation AMD designs across embedded, server, desktop and mobile platforms.

The role requires strong digital circuit fundamentals, expert STA tool experience, and scripting skills. You will collaborate with CAD and ML teams to integrate ML workflows into EDA, document findings, and support design verification and performance analysis.

Qualifications

• Strong digital circuit fundamentals. Proficient in STA methodologies for timing closure.
• Expert user of STA signoff tools, extraction and placement and routing tools.
• Experience with analyzing timing reports and identifying design/constraint issues.
• Familiarity with Verilog and SystemVerilog for design.
• Familiarity on 3DIC design implementation and analysis. Requires EDA tool competence and strong scripting capability.
• Excellent UNIX and programming skills (Perl, Python, and TCL).
• Collaborate with CAD and ML teams to develop and optimize machine learning models for EDA (Electronic Design Automation) workflows.
• Assist in automating design verification, simulation, and performance analysis using ML techniques.
• Contribute to data preprocessing, feature engineering, and model evaluation for silicon design datasets.
• Support the integration of ML tools into AMD’s internal CAD infrastructure and workflows.
• Document findings, present results, and propose improvements to enhance design efficiency and accuracy.
• Ability to provide technical presentations and write clear documentation.
• Experience working on multiple projects in a global team environment.

Responsibilities

• Develop and deliver timing methodology flow for next generation designs.
• Release high quality flows and provide support to design teams on critical issues.
• Evaluate and qualify capabilities of new EDA tools and collaboratively develop new features.
• Provide technical leadership, mentoring and customer support in a global multi-cultural work environment.

Skills

STA methodologies

EDA tools

Verilog/SV

Unix scripting

Perl/Python/TCL

ML for EDA

Education

Bachelor's or Master’s in CE/EE

Tools

EDA tool suites

Scripting: Perl, Python, TCL

ML in EDA

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

THE ROLE:

In this role, as part of CAD Methodology team, you’ll have the opportunity to develop and deploy differentiating methodologies for next generation AMD designs. Your contributions will impact several products across all market segments from adaptive embedded computing, server, desktop to laptop designs.

THE PERSON:

AMD is looking for a dynamic, self-motivated, experienced, detail-oriented timing analysis engineer with strong technical knowledge and excellent communication and interpersonal skills.

KEY RESPONSIBLITIES:

• Develop and deliver timing methodology flow for next generation designs.
• Release high quality flows and provide support to design teams on critical issues.
• Evaluate and qualify capabilities of new EDA tools and collaboratively develop new features.
• Provide technical leadership, mentoring and customer support in a global multi-cultural work environment.

REFERRED EXPERIENCE:

• Strong digital circuit fundamentals. Proficient in STA methodologies for timing closure.
• Expert user of STA signoff tools, extraction and placement and routing tools.
• Experience with analyzing timing reports and identifying design/constraint issues.
• Familiarity with Verilog and System Verilog for design.
• Familiarity on 3DIC design implementation and analysis. Requires EDA tool competence and strong scripting capability.
• ExcellentUNIXandprogramming skills(Perl, Python, and TCL).
• Collaborate with CAD and ML teams to develop and optimize machine learning models for EDA (Electronic Design Automation) workflows.
• Assist in automating design verification, simulation, and performance analysis using ML techniques.
• Contribute to data preprocessing, feature engineering, and model evaluation for silicon design datasets.
• Support the integration of ML tools into AMD’s internal CAD infrastructure and workflows.
• Document findings, present results, and propose improvements to enhance design efficiency and accuracy.
• Ability to provide technical presentations and write clear documentation.
• Experience working on multiple projects in a global team environment.

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering

LOCATION: Austin, TX ( Open to Ft. Collins, CO.)

This role is not eligible for visa sponsorship.

#LI-SL3

#LI-HYBRID

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.