Sr Staff Engineer, Program/Project Management-Test Readiness Lead-CB Tray

Celestica Inc.; Richardson (TX); On-site; USD 140,000 - 180,000; Full time

Job summary

Celestica, Inc. is seeking a Sr Staff Engineer to own end-to-end test architecture, strategy, and execution for next-generation hardware products.

You will lead a team of test hardware and software engineers, aligning with Front-End/Back-End managers and the Director of Technology Roadmapping to maximize coverage and optimize throughput. The role requires 8+ years in test development within high-density hardware, along with expertise in DFT, JTAG, PCIe, Python/C++, LabVIEW, and data analytics.

Qualifications

• Bachelor’s or Master’s degree in Electrical/Computer Engineering, CS or related technical discipline.
• 8+ years of dedicated engineering experience in Test Development, Functional Testing architecture, ATE hardware infrastructure, or NPI Test leadership.
• Experience deploying complex test vectors for high-speed digital systems and working with tier-1 silicon providers (Nvidia, Broadcom, Marvell).

Responsibilities

• Directly manage and mentor a team of Test Hardware and Software Engineers.
• Define test engineering metrics, KPIs, and deliverables; conduct performance evaluations.
• Plan and manage engineering bandwidth, test equipment budgets, and lab infrastructure across concurrent NPI initiatives.
• Drive DFT/DFx reviews during early schematic and board layout stages.
• Collaborate with silicon partners to embed BIST, high-speed JTAG, and diagnostic hooks.
• Formulate unified test specifications with coverage matrices and test point allocations.
• Oversee ICT, FCT, SLT, and ESS/Burn-in solutions; drive yield optimization via data analytics.
• Provide hands-on guidance for initial test vehicle bring-up and fixture qualification.

Skills

DFT methodologies

JTAG Boundary Scan

PCIe Gen5/6 SerDes

Python

C/C++

LabVIEW

SPC/Data analytics

Project management

Education

Bachelor's or Master’s degree in Electrical/Computer Engineering, CS

Job description

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Sr Staff Engineer, Program/Project Management-Test Readiness Lead-CB Tray

Date: Aug 27, 2026

Summary

As the Senior Manager of HPS Test Engineering, you will own the end-to-end testing architecture, strategy, and execution for next-generation or products and infrastructure. This position bridges the gap between top-tier silicon designers, internal hardware/software teams, and volume manufacturing operations. You will be responsible for leading a high-performing team of test hardware and software engineers to develop comprehensive test solutions (ICT, FCT, SLT, BI and Boundary Scan). You will maintain critical cross-functional alignment with the Front-End Senior Manager, Back-End Senior Manager, and Director of Technology Roadmapping to maximize test coverage, minimize escape metrics, and optimize manufacturing throughput and first-pass yield.

Detailed Description

Talent Development & Mentorship: Directly manage, coach, and mentor a specialized team of Test Hardware and Software Engineers, fostering technical proficiency in advanced diagnostic test development and automated frameworks.

Performance Management: Define clear test engineering metrics, KPIs, and deliverables; conduct objective performance evaluations and outline robust engineering career paths.

Resource Optimization: Plan and manage engineering bandwidth, test equipment budgets (CapEx), and lab infrastructure allocations across concurrent high-visibility NPI initiatives.

2. Early Engagement & Design for Testability (DFT)

DFT Strategy Ownership: Drive comprehensive DFT/DFx technical reviews during early schematic and board layout design stages to maximize structural and functional test access.

Silicon Partner Collaboration: Engage directly with tier-1 silicon architects (e.g., Nvidia, Broadcom, Marvell, Intel, AMD) to embed built-in self-test (BIST), high-speed JTAG boundary scan architectures, and advanced custom diagnostic hooks.

Test Plan Architecture: Formulate unified product test specifications (PTS) defining rigorous test coverage matrices, test point allocations, and optimization bounds before design freeze.

3. Advanced Test Characterization & Process Development

Multi-Level Test Execution: Oversee the specification, architecture, and deployment of In-Circuit Test (ICT), Functional Test (FCT), System-Level Test (SLT), and Environmental Stress Screening (ESS/Burn-in) solutions.

Yield Optimization & Data Analytics: Analyze production data sets to identify false failures, test instabilities, and gauge R&R shortfalls, systematically driving continuous optimization of test limits and fixture designs.

NPI Core Prototyping: Provide hands-on engineering guidance for initial test vehicle bring-up and debugs, test fixture qualification, diagnostic software stability checks, and strict version control for test binaries.

#HPS-NA

People Management Experience: 5+ years of direct experience leading and scaling multi-disciplinary test hardware and software engineering teams.

Industry Context: Proven experience deploying complex test vectors for high-speed digital systems, enterprise servers, hyperscaler infrastructure, or working directly alongside tier-1 silicon providers (Nvidia, Broadcom, Marvell).

Technical Expertise: Expert level understanding of DFT methodologies, IEEE 1149.x Boundary Scan (JTAG), high-speed serial links (PCIe Gen 5/6, SerDes), instrumentation automation, programming frameworks (Python, C/C++, LabVIEW), and database/data mining systems for statistical process control (SPC).

Leadership Strategy: Outstanding project management maturity with a focus on metrics-driven problem solving (Six Sigma Black Belt preferred); ability to translate technical yield constraints to business risks for C-suite and customer reviews.

Physical Demands

• Duties of this position are performed in a normal office environment.
• Duties may require extended periods of sitting and sustained visual concentration on a computer monitor or on numbers and other detailed data.
• Repetitive manual movements (e.g., data entry, using a computer mouse, using a calculator, etc.) are frequently required.
• Occasional travel may be required.

Typical Experience

• Technical Experience: 8+ years of dedicated engineering experience in Test Development, Functional Testing architecture, ATE hardware infrastructure, or NPI Test leadership inside high-density hardware industries.

Typical Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.

Educational Requirements may vary by Geography

Notes

This job description is not intended to be an exhaustive list of all duties and responsibilities of the position. Employees are held accountable for all duties of the job. Job duties and the % of time identified for any function are subject to change at any time.

Celestica is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, age, pregnancy, genetic information, disability, status as a protected veteran, or any other protected category under applicable federal, state, and local laws.
This policy applies to hiring, promotion, discharge, pay, fringe benefits, job training, classification, referral and other aspects of employment and also states that retaliation against a person who files a charge of discrimination, participates in a discrimination proceeding, or otherwise opposes an unlawful employment practice will not be tolerated. All information will be kept confidential according to EEO guidelines.
Celestica is an E-Verify employer.

COMPANY OVERVIEW:

Celestica, Inc. (NYSE: CLS; TSX: CLS) is a technology leader dedicated to driving customer success and market advancements. With deep expertise in design, engineering, manufacturing, supply chain, and platform solutions, Celestica enables critical data center infrastructure for AI, cloud, and hybrid cloud and advances technologies in high-growth markets. With a talented team and a strategic global network, Celestica helps its customers achieve competitive advantages.

Today, Celestica delivers innovative supply chain solutions globally to customers in strategic two operating and reporting segments: Advanced Technology Solutions (ATS) and Connectivity and Cloud Solutions (CC):

ATS: This segment serves customers in complex, regulated and high-reliability markets such as Industrial & Smart Energy, Aerospace & Defense, Semiconductor Capital Equipment, and HealthTech. It is engineering led, with deep expertise in design, manufacturing and lifecycle solutions.

CCS: This segment focuses on high-performance technology solutions and services for the data center, serving hyperscalers, digital native customers and enterprises. Celestica's Platform Solutions offering provides innovative and customizable computing, storage and networking solutions enabling AI-driven growth.

Built on a legacy of trust and performance, Celestica has earned its reputation by delivering results in complex and fast-changing markets. Celestica exceeds customer expectations by identifying trends and staying ahead of the curve. Backed by comprehensive capabilities and a global network across North America, Europe and Asia, Celestica helps customers gain competitive advantage with the quality, flexibility and resiliency they need to respond quickly to shifts in demand. Guided by a bold vision to accelerate market advancements, Celestica delivers innovative solutions and technologies that turn complexity into opportunity. Anchored in teamwork and commitment, Celestica strives to be the most trusted partner to its customers and colleagues worldwide.

Celestica would like to thank all applicants, however, only qualified applicants will be contacted.
Celestica does not accept unsolicited resumes from recruitment agencies or fee based recruitment services.

Nearest Major Market: Dallas
Nearest Secondary Market: Fort Worth
Job Segment: Front End, Project Engineer, Test Engineer, Project Manager, Data Mining, Technology, Engineering