SR Radar Engineer

Judge Consulting Group

Seattle (WA)

On-site

USD 150,000 - 210,000

Full time

47 hours ago
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Job summary

Judge Consulting Group in Seattle, WA is seeking a Senior Radar Engineer to own the signal processing chain of a Ku-band phased-array radar, from waveform to track. You will translate models from MATLAB or Python into real-time implementations on FPGA and SoC hardware.

This hands-on role entails writing models, conducting lab and field tests, and collaborating with DSP, FPGA, RF engineers to optimize performance and latency.

Qualifications

  • BS in Electrical Engineering, Physics, or a related field.
  • 5+ years developing radar signal processing algorithms for fielded or prototype radar systems.
  • Strong DSP fundamentals: sampling and multirate processing, filter design, spectral estimation, detection and estimation theory.
  • Hands-on experience with pulse-Doppler and FMCW processing: pulse compression, range-Doppler maps, CFAR.
  • Experience taking algorithms to hardware with fixed-point conversion and real-time constraints.
  • Experience collecting data from real radar hardware in the lab and field.

Responsibilities

  • Define radar waveforms and operating modes (FMCW, pulse-Doppler, LFM and phase-coded) and trade range resolution, unambiguous velocity, duty cycle, and search timeline against system requirements
  • Develop the end-to-end processing chain: pulse compression, range-Doppler processing, digital beamforming, clutter suppression, CFAR detection, and angle estimation
  • Build detection and tracking algorithms for small targets including track initiation, data association, and state estimation
  • Develop target discrimination methods, such as micro-Doppler feature extraction, to separate drones from birds and ground clutter
  • Build and maintain radar performance models (range equation, SNR and detection probability, clutter and multipath, array pattern and scan loss) that drive architecture decisions for the array, RFIC, and digital back end
  • Partner with DSP and FPGA engineers to partition algorithms across FPGA, SoC, and host; define fixed-point and latency budgets; and verify implementations bit-true against reference models
  • Plan and run lab and field tests: collect and analyze data, characterize system performance, and close the loop between model and measurement
  • Work with the RF and antenna teams on array calibration and beam-steering strategy

Skills

Radar signal processing
DSP fundamentals
MATLAB
Python
Fixed-point implementation
Real-time processing
Data analysis
Algorithm development

Education

Bachelor's degree in Electrical Engineering or Physics
MS or PhD (preferred)

Tools

MATLAB
Python
C/C++
HDL/HLS
AMD RFSoC platforms

Job description

We are hiring a Senior Radar Engineer to own the signal processing chain of our Ku-band phased-array radar, from waveform to track. You will develop the algorithms that turn raw array data into reliable detections and tracks of small, low-RCS targets such as drones, and carry them from models in MATLAB or Python to real-time implementation on FPGA and SoC hardware with our DSP, FPGA, and RF engineers.

This is a hands-on role. You will write the models, run the lab and field tests, and work directly with the data.

Responsibilities
  • Define radar waveforms and operating modes (FMCW, pulse-Doppler, LFM and phase-coded) and trade range resolution, unambiguous velocity, duty cycle, and search timeline against system requirements
  • Develop the end-to-end processing chain: pulse compression, range-Doppler processing, digital beamforming, clutter suppression, CFAR detection, and angle estimation
  • Build detection and tracking algorithms for small, slow, low-flying targets in clutter, including track initiation, data association, and state estimation
  • Develop target discrimination methods, such as micro-Doppler feature extraction, to separate drones from birds and ground clutter
  • Build and maintain radar performance models (range equation, SNR and detection probability, clutter and multipath, array pattern and scan loss) that drive architecture decisions for the array, RFIC, and digital back end
  • Partner with DSP and FPGA engineers to partition algorithms across FPGA, SoC, and host; define fixed-point and latency budgets; and verify implementations bit-true against reference models
  • Plan and run lab and field tests: collect and analyze data, characterize system performance, and close the loop between model and measurement
  • Work with the RF and antenna teams on array calibration and beam-steering strategy
Required Qualifications
  • BS in Electrical Engineering, Physics, or a related field
  • 5+ years developing radar signal processing algorithms for fielded or prototype radar systems
  • Strong DSP fundamentals: sampling and multirate processing, filter design, spectral estimation, detection and estimation theory, and statistical signal processing
  • Hands-on experience with pulse-Doppler and/or FMCW processing: pulse compression, range-Doppler maps, MTI/MTD clutter filtering, and CFAR
  • Array signal processing experience: digital or hybrid beamforming, angle-of-arrival estimation, and monopulse
  • Fluency in MATLAB and/or Python for algorithm development and data analysis
  • Experience taking algorithms to hardware, including fixed-point conversion, real-time constraints, and verification alongside FPGA or embedded engineers
  • Experience collecting and analyzing data from real radar hardware in the lab and field
Preferred Qualifications
  • MS or PhD in Electrical Engineering or a related field
  • Adaptive beamforming, STAP, or high-resolution direction finding (MUSIC, ESPRIT)
  • Experience with MIMO, multistatic, or networked radar architectures and advanced waveform design
  • Multi-target tracking (IMM, JPDA, MHT) and sensor fusion across networked radars
  • Micro-Doppler analysis or machine-learning-based target classification
  • C/C++ for real-time processing; familiarity with HDL, HLS, or AMD RFSoC platforms
  • Ku- or Ka-band phased-array experience, including array calibration
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