Sr. Implementation Engineer, Amazon Leo

Amazon Inc.; Sunnyvale, Northern (CA, KY); Hybrid; USD 213,000 - 288,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

RSUs

Job summary

Amazon Kuiper Manufacturing Enterprises LLC in Sunnyvale is seeking an experienced ASIC implementation engineer to shape power-aware chip design for LEO satellite communications. You will collaborate with ASIC teams to define UPF-based power intents and drive RTL and netlist validation.

You will establish flow for both logic and physical synthesis across multiple CMOS nodes, lead timing sign-off, coordinate with RFIC and P&R teams, and ensure DFM criteria are met through IR/EM checks.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 8+ years of experience in ASIC implementation (synthesis, STA, P&R for deep sub-micron nodes).
• Experience leading the methodology and scripts for physical synthesis.
• Proven track record taping out chips that reached high-volume production.
• Familiar with chips with multiple power islands and power gating.

Responsibilities

• Develop the chip power intent using UPF with the ASIC design team.
• Validate UPF at RTL and netlist level with standard tools.
• Set up logic and physical synthesis flow for multiple technology nodes.
• Develop implementation methodologies, including AI-assisted flows.
• Coordinate with ASIC, DFT, RFIC and P&R teams for integration and timing.
• Check RTL for clean synthesis, perform STA and LEC on netlists.
• Ensure top-level integration with RFIC and P&R teams and connectivity checks.
• Lead timing sign-off for the post P&R database and verify IR/EM DFMs.

Skills

ASIC implementation

Synthesis/STA/DFM

P&R for sub-micron nodes

Power management UPF

Education

Bachelor's degree in Electrical Engineering

Master's or Ph.D in Electrical/Communications Engineering

Tools

UPF tooling

Industry standard EDA tools

Job description

Job ID: 10572766 | Amazon Kuiper Manufacturing Enterprises LLC

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.

The Role:

Be part of Amazon Leo’s sub-team responsible for defining and implementing the digital chip SOCs for communications via Low Earth Orbit satellites and Amazon gateways. This is a unique opportunity to define a groundbreaking wireless solution with few legacy constraints. The team works with customer requirements and wireless system teams to define modems, high-speed interfaces, embedded processors, and DSP solutions in latest CMOS generation technologies.

In this role you will:

• As the implementation engineer you will work with the ASIC design team to develop the chip power intent using UPF
• As the implementation lead you will work with the ASIC design team to validate UPF at RTL and netlist level using industry standard tools
• As the implementation lead you will set up the flow for both logic and physical synthesis flow for various technology nodes.
• Develop implementation methodologies while embracing AI flow.
• Work with the ASIC design and DFT teams to understand the design and create timing constraints.
• Check the RTL design for clean synthesis run, perform STA and LEC on netlist.
• Work with RFIC teams to make sure the top level integration of analog blocks are done properly and correct by construction, including formal connectivity checks.
• Work with P&R teams to ensure a smooth hand off of netlists, ensure the timely execution of the P&R responsibilities by that team.
• Participate in flow reviews of all the blocks with the P&R team to ensure that they achieve the best PPA for all blocks.
• Lead the timing sign-off for the post P&R database.
• Ensure that the chip meets the required DFM criteria by verifying the IR/EM results.

Export Control Requirement:

Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

Basic Qualifications

• Bachelor's degree in Electrical Engineering or a related field
• 8+ years of experience in ASIC implementation, i.e., synthesis, STA and working with P&R for deep sub-micron nodes, preferable 16nm or smaller.
• Experience leading or solely developing the methodology and scripts for physical synthesis.
• Proven track record in taping out chips that have gone in to high volume production.
• Familiar with implementing chips that have multiple power islands and power gating.

Preferred Qualifications

• Master's or Ph.D degree in Electrical / Communications Engineering.
• 10+ years of experience in ASIC implementation.
• Experience in leading physical design.
• Strong exposure to UPF flow for low power design.
• Strong written and verbal skills
• Experience of working in multi-site/multi-team environment

The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits .

USA, CA, San Diego - 185,200.00 - 250,000.00 USD annually

USA, CA, Sunnyvale - 213,000.00 - 287,500.00 USD annually

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Veterans, military spouses, and people with disabilities are encouraged to apply.