Sr Hardware Design Engineer

Actalent; United States; On-site; USD 85,411 - 129,494; Full time

Benefits offered by this job

Medical, dental, & vision

401(k) retirement plan

PTO / Time Off

Job summary

Actalent is seeking a Sr Hardware Design Engineer in Torrance, CA to design, review, and optimize digital hardware including high-speed memory and interfaces. You will guide PCB layout, perform signal integrity simulations and help ensure robust, manufacturable designs.

The role emphasizes hands-on circuit design, redesigns to resolve issues, and collaboration with cross-functional teams. Onsite, contract-to-hire, with competitive hourly pay.

Qualifications

• Proven experience in digital hardware design and PCB layout for complex digital systems.
• Hands-on schematic design and review experience.
• PCB layout for multilayer boards (4–8 layers, up to 10).
• Experience with high-frequency simulations and signal integrity analysis.
• Experience with memory interfaces DDR2/DDR3/DDR4 and high-speed interfaces.

Responsibilities

• Design and develop digital hardware circuits and multilayer PCBs.
• Review and refine schematics for correctness and robustness.
• Oversee PCB layout for 4–8 layer boards, up to 10 layers.
• Use Altium for schematic capture and PCB layout.
• Perform HFSS simulations to validate high-speed designs.
• Redesign circuits to resolve performance or manufacturability issues.
• Implement DDR2/DDR3/DDR4 memory interfaces with SI requirements.
• Integrate HDMI, DisplayPort, USB-C/USB 3.x, PCIe, LVDS, MIPI, and SFP/SFP+ interfaces.
• Interface digital hardware with microcontrollers with proper timing and power.
• Design for high-speed TMDS and 10 Gigabit Ethernet.
• Practice differential routing, length matching and controlled impedance routing.
• Collaborate with cross-functional teams for design reviews and testing.
• Document design decisions and test results for future iterations.

Skills

Digital hardware design

Schematic design

PCB layout review

Altium

HFSS simulations

DDR2/DDR3/DDR4 interfaces

HDMI/DisplayPort/USB-C interfaces

High-speed signal integrity

Return path management

Microcontroller interfacing

Signal integrity analysis

Education

Electrical engineering or related field

Tools

Altium

HFSS

Job description

Job Title: Sr Hardware Design Engineer

Job Description

This role focuses on the design, review, and optimization of complex digital hardware, including high-speed multilayer printed circuit boards and advanced memory and interface subsystems. The Senior Hardware Design Engineer will work on circuit and schematic design, guide PCB layout, and ensure robust signal and power integrity for products that integrate high-speed memory, video, multimedia, and networking interfaces. The position requires strong hands-on design experience, the ability to identify and correct design issues through redesign, and proficiency with industry-standard tools and simulation environments.

Responsibilities

• Design and develop digital hardware circuits, including complex, multilayer printed circuit boards.
• Create, review, and refine detailed schematics to ensure functional correctness and design robustness.
• Oversee and perform PCB layout design and review for boards typically ranging from 4 to 8 layers, with occasional 10-layer designs.
• Use Altium for schematic capture and PCB layout to implement and update board designs.
• Perform electromagnetic and high-frequency simulations using HFSS to validate and optimize high-speed designs.
• Redesign existing circuits and boards to resolve performance, reliability, or manufacturability issues and ensure that potential problems are identified and corrected early.
• Implement and validate high-speed memory interfaces such as DDR2, DDR3, and DDR4 in accordance with performance and signal integrity requirements.
• Integrate and support a wide range of high-speed peripheral interfaces, including HDMI, DisplayPort, USB-C / USB 3.x, DVI, 3G/12G-SDI, SFP / SFP+ fiber transceivers, 1G / 10G Ethernet, PCIe, LVDS, and MIPI.
• Interface digital hardware designs with microcontrollers, ensuring proper connectivity, timing, and power considerations.
• Design with careful consideration of high-speed signals, including TMDS at 150 MHz to 500 MHz and 10 Gigabit Ethernet, and validate that these interfaces meet performance targets.
• Apply best practices for routing differential pairs, length matching, controlled impedance routing, and return path management on multilayer boards.
• Analyze and mitigate signal integrity and power integrity issues, including crosstalk, eye diagram performance, and multi-gigabit differential interface behavior.
• Collaborate with cross-functional teams to review designs, address feedback, and support system-level integration and testing.
• Document design decisions, constraints, and test results to support ongoing maintenance and future design iterations.

Essential Skills

• Proven experience in digital hardware design, including circuit design and PCB layout for complex digital systems.
• Hands-on experience with schematic design and review, ensuring accurate and reliable hardware implementations.
• Strong proficiency in PCB layout design and review for multilayer boards, typically 4 to 8 layers, with exposure to 10-layer designs.
• Practical experience using Altium for schematic capture and PCB layout.
• Experience performing simulations using HFSS or similar tools to evaluate high-frequency and electromagnetic behavior.
• Demonstrated ability to redesign existing hardware to identify, troubleshoot, and correct design issues.
• Experience working with DDR2, DDR3, and DDR4 memory interfaces and understanding of their layout and timing requirements.
• Experience with a broad range of peripherals, including HDMI, DisplayPort, USB-C / USB 3.x, DVI, 3G/12G-SDI, SFP / SFP+ fiber transceivers, 1G / 10G Ethernet, PCIe, LVDS, and MIPI.
• Experience interfacing digital hardware with microcontrollers, including proper signal, timing, and power considerations.
• Experience designing with high-speed signals such as TMDS (150 MHz to 500 MHz) and 10 Gigabit Ethernet.
• Strong understanding of high-speed digital design concepts, including DDR, SDRAM, and Ethernet interfaces.
• Expertise in routing differential pairs, performing length matching, and managing return paths for high-speed signals.
• Experience addressing and analyzing crosstalk, eye diagrams, and other signal integrity metrics.
• Knowledge and practical experience in SIPI (signal integrity and power integrity) analysis.
• Experience working with multi-gigabit differential interfaces and controlled impedance routing.
• Experience with electronics, electrical engineering, or a closely related field, with solid knowledge of circuit design and PCB design.

Additional Skills & Qualifications

• Experience with video or multimedia products, particularly those involving high-speed video interfaces.
• FPGA experience, including integrating FPGAs into board-level designs and supporting associated high-speed interfaces.
• Broader experience in electronics and electrical engineering, including exposure to multimedia and video-centric systems.
• Familiarity with industry best practices for high-speed digital design, verification, and validation.

Work Environment

The role centers on a hardware design environment that relies heavily on professional electronic design automation tools, including Altium for schematic capture and PCB layout and HFSS for high-frequency and electromagnetic simulations. The engineer will work with multilayer printed circuit boards, typically ranging from 4 to 8 layers with occasional 10-layer designs, and will handle high-speed interfaces such as DDR2/DDR3/DDR4, HDMI, DisplayPort, USB-C / USB 3.x, DVI, 3G/12G-SDI, SFP / SFP+ fiber, 1G / 10G Ethernet, PCIe, LVDS, and MIPI. The work involves close collaboration with other engineers and technical teams, focusing on detailed design reviews, iterative redesigns, and rigorous analysis of signal and power integrity. The environment emphasizes precision, thorough documentation, and continuous improvement of existing and new hardware designs.

Job Type & Location

This is a Contract to Hire position based out of Torrance, CA.

Pay and Benefits

The pay range for this position is $62.00 - $94.00/hr.

Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following:

• Medical, dental & vision
• Critical Illness, Accident, and Hospital
• 401(k) Retirement Plan – Pre-tax and Roth post-tax contributions available
• Life Insurance (Voluntary Life & AD&D for the employee and dependents)
• Short and long-term disability
• Health Spending Account (HSA)
• Transportation benefits
• Employee Assistance Program
• Time Off/Leave (PTO, Vacation or Sick Leave)

Workplace Type

This is a fully onsite position in Torrance,CA.

Application Deadline

This position is anticipated to close on Aug 7, 2026.

About Actalent

Actalent is a global leader in engineering and sciences services and talent solutions. We help visionary companies advance their engineering and science initiatives through access to specialized experts who drive scale, innovation and speed to market. With a network of almost 20,000 consultants and 5,000 clients across the U.S., Canada, Asia and Europe, Actalent serves many of the Fortune 500. We are proud to be an Engineering News-Record (ENR) Top 500 Design Firm for our engineering design services and a ClearlyRated Best of Staffing® winner for both client and talent service.

The company is an equal opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.

If you would like to request a reasonable accommodation, such as the modification or adjustment of the job application process or interviewing process due to a disability, please email [e-mail] for other accommodation options.

San Francisco Fair Chance Ordinance

Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records.

Massachusetts Lie Detector

It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability.

Use of Artificial Intelligence (AI)

We may use Artificial Intelligence (AI) to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools.