Sr. Engineer, Silicon Validation , Annapurna Labs

Amazon; Cupertino (CA); On-site; USD 183,000 - 248,000; Full time

Job summary

Annapurna Labs (U.S.) Inc. in Cupertino, CA is seeking a Sr ASIC validation engineer to lead SW-driven test development for Trainium and Inferentia engines, directing pre-silicon verification and ensuring silicon quality.

You will mentor engineers, collaborate across architects, design, verification, and software teams, and influence technical investments while shaping validation strategies for multiple chip generations.

Qualifications

• 6+ years of verification or chip design experience.
• 2+ years HW/SW co-design-based testing.
• 3+ years validation of AI acceleration engines.
• Knowledge of AI acceleration HW architecture.
• Understanding of verification methodologies and coverage.

Responsibilities

• Develop, run and debug SW based testing primarily for pre-silicon validation of compute and AI acceleration engines.
• Develop unit and end-to-end testing across single engines and neural network layers.
• Focus on early development of testing and quick ramp of Neuron testing on emulation.
• Contribute and debug across RTL through firmware, software and testbench development.
• Reuse and scale verification infra across pre-Si and emulation teams.
• Collaborate with Architects, Chip design, chip verification, post silicon validation and software teams.
• Drive strategic technical decisions across verification teams and product lines.

Skills

HW/SW co-design testing

ML accelerator testing

Emulation testing

Computer architecture

Education

Masters in computer Science or Electrical Engineering

Tools

Emulation platforms

RTL

Firmware

Job description

Description

As a Sr ASIC validation engineer on our team, you will independently lead the SW driven early stages test development for our Trainium and Inferentia AI acceleration engines, drive the testing strategy at the sub system/ system level, drive functional and performance pre silicon verification and ensure silicon quality. You will tackle complex problems rooted across hardware and software domains, develop innovative validation methodologies, and set the standard for engineering excellence across our organization.

Description

As a Sr ASIC validation engineer on our team, you will independently lead the SW driven early stages test development for our Trainium and Inferentia AI acceleration engines, drive the testing strategy at the sub system/ system level, drive functional and performance pre silicon verification and ensure silicon quality. You will tackle complex problems rooted across hardware and software domains, develop innovative validation methodologies, and set the standard for engineering excellence across our organization.

This role requires a unique combination of deep technical expertise in in HW/SW concurrent verification methodologies and strategies as well as excellent knowledge and understanding of our AI acceleration engines architecture and design. The role requires coordination across teams, and the ability to navigate ambiguity during silicon development cycles. You will mentor junior and senior engineers, influence architectural decisions that impact multiple chip generations, and ensure our custom silicon meets the highest standards of quality and reliability.

Key job responsibilities

• Develop, run and debug SW based testing primarily for the pre silicon validation of the compute and AI acceleration engines
• Develop unit testing as well as end to end testing, varying simple single engine operations as well as entire neural network layers.
• Focus on early development of testing, finding early bugs and supporting quick ramp of fully compiled software (aka Neuron) testing on emulation
• Contribute and debug over multiple layers of the stack for test development – from RTL through firmware, software and testbench development
• Re-use and scale verification infra across pre-Si and emulation teams.
• Closely collaborate with Architects, Chip design, chip verification, post silicon validation and software teams.
• Drive strategic technical decision across the different verification teams and the different stages of verification for our Trainium and Inferentia product lines
• Mentor both junior and Senior verification engineers and drive the team’s technical growth as well as individual member’s growth

Basic Qualifications

• 6+ years of experience working as verification or chip design engineer
• 2+ years of experience in HW/SW co-design-based testing
• Proven experience developing SW based tests for ML accelerator SOC
• 3+ years experience working on the verification of AI acceleration engines
• Computer architecture and AI acceleration HW architecture knowledge
• Deep understanding of hardware verification methodologies and coverage analysis
• Experience testing on emulation platforms

Preferred Qualifications

• Masters in computer Science, Electrical Engineering, or related field
• Deep understanding of hardware verification methodologies and coverage analysis
• Experience developing validation frameworks, test automation infrastructure, or debug tools
• Demonstrated ability to influence senior leadership on technical investments and priorities

Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status.

Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit https://amazon.jobs/content/en/how-we-hire/accommodations for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner.

The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at https://amazon.jobs/en/benefits.

USA, CA, Cupertino - 183,000.00 - 247,600.00 USD annually

USA, TX, Austin - 159,200.00 - 215,300.00 USD annually

Company

Annapurna Labs (U.S.) Inc.

Job ID: A10484162