Sr Digital Physical Design Engineer

Keysight Technologies SAles Spain SL.; Colorado Springs (CO); On-site; USD 151,000 - 253,000; Full time

Benefits offered by this job

Medical, dental and vision

401(k) Plan

Tuition Reimbursement

Job summary

Keysight Technologies SAles Spain SL. is seeking an experienced Physical Design R&D engineer in Colorado Springs to lead both module and SoC level implementation from RTL to GDS for digital and mixed signal ASICs.

You will tackle complex design problems, collaborate with cross-functional teams, and drive tool flows while coordinating with foundries to meet milestones and ensure quality and performance.

Qualifications

• Industry tapeout experience.
• Desire to identify and debug problems.
• Experience with task automation and scripting.
• Strong EE fundamentals with experience in ASIC Design, DSP, digital architectures/systems, and verification of large and mixed signal ASIC designs.
• Leadership skills to gain credibility and respect to drive change and influence teams and partners towards higher levels of execution, return, and productivity.
• Strong teamwork and written/verbal communication skills.

Responsibilities

• Participate in the entire spectrum of full ASIC design activities including definition, architectures, digital logic design, IP validation and synthesis.
• Responsible for floor planning, PNR, timing closure, STA, formal verification, low power design, clock distribution, EMIR analysis and physical verification.
• Close sign-off checks, interface with industry foundries and GDS delivery.
• Work extensively with cross functional teams to guide architecture with physical design constraints.
• Develop tool flows and drive vendors to achieve milestones.

Skills

Industry tapeout experience

Problem solving

Automation & scripting

EE fundamentals

Leadership & collaboration

Teamwork & communication

Object-oriented programming

Education

Electrical or Computer Engineering degree

Tools

Innovus

Tempus

Voltus

Genus

Job description

Overview

Keysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~16,800 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn moreabout what we do.

Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions.We belief that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.

A major success factor for the company continues to be the development and deployment of breakthrough Digital/DSP and mixed signal ASICs that drive the performance and value of new products. We have an exciting opportunity for an experienced Physical Design R&D engineer responsible for the physical design and tape release of digital and mixed signal ASICs.

About the Team

We are located in Colorado Springs, Colorado at the base of Pikes Peak. You’ll collaborate in a team environment to develop digital / DSP and mixed signal ASICs that meets customer functionality, schedule, and quality requirements. This job will be part of Keysight Laboratories, a world-renowned technology organization which enables Keysight to be first to market with breakthrough products and solutions.

Responsibilities

ExperiencedDigital Physical Design ASIC R&D engineer responsible forboth module level as well as SoC Level implementationfrom RTL to GDSof digital and mixed signal ASICs.Solves complex and high impact design and development problems include customer application issues of varying scope and complexity. Uses product and customer applications knowledge to determine, define, develop, and validate design concepts and methods.

• Participate in the entire spectrum of full ASIC design activities including definition, architectures, digital logic design, IP validation and synthesis.
• Responsible for floor planning, PNR, timing closure, STA, formal verification, low power design, clock distribution, EMIR analysis and physical verification
• Close sign-off checks, interface with industry foundries and GDS delivery
• Work extensively with cross functional teams to guide architecture with physical design constraints
• Develop tool flows and drive vendors to achieve milestones

Qualifications

Bachelors or master’s degree in electrical or computer engineering. Typically, 20 years relevant experience. Requires extensive experience and knowledge and ability to work independently.

Basic Qualifications

• Industry tapeout experience
• Desire to identify and debug problems.
• Experience with Innovus, Tempus, Voltus and Genus
• Experience with task automation and scripting
• Strong EE fundamentals with experience in ASIC Design, DSP, digital architectures/systems, and verification of large and mixed signal ASIC designs
• Leadership skills to gain credibility and respect to drive change and influence teams and partners towards higher levels of execution, return, and productivity
• Strong teamwork and written/verbal communication skills

Wanted Qualifications

• Experience in digital and analog ASIC design flow, methodologies, and process
• Experience with DFT architecture and implementation
• Fluent with object-oriented programming
• Ability to multi-task and to engage with multiple projects, engineers, and partnerships

Other Information

• Relocation is available for this position
• Visa Sponsorship is not available for this position

ITAR statement: This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals,lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Departmentof State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export-controlled items.Employment in this position for non-U.S. persons is contingent on Keysight’s ability to obtain any required government authorizations.

We are unable to support visa sponsorship for this position.

Careers Privacy Statement

Keysight Technologies Inc. is an equal opportunity employer. Qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability or any other protected categories under all applicable laws.

Most offers will be between the minimum and the midpoint of the Salary Range listed below.

MIN $151,800.00 - MAX $253,000.00

Note: For other locations, pay ranges will vary by region

This role is eligible for Keysight Results Bonus Program

US Employees may be eligible for the following benefits:

• Medical, dental and vision
• Health Savings Account
• Health Care and Dependent Care Flexible Spending Accounts
• Life, Accident, Disability insurance
• Business Travel Accident and Business Travel Health
• 401(k) Plan
• Flexible Time Off, Paid Holidays
• Paid Family Leave
• Discounts, Perks
• Tuition Reimbursement
• Adoption Assistance
• ESPP (Employee Stock Purchase Plan)
• Restricted Stock Units

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