Space-Grade CMOS RF Design Lead

0090 CORP-Corporate Office; United States; On-site; USD 142,200 - 213,400; Full time

Benefits offered by this job

Discretionary bonus

Health insurance

Long‑Term Incentives

Paid time off

Job summary

Northrop Grumman is seeking a Senior CMOS Design Engineer to lead RF and mixed-signal IC development for space payloads. You will collaborate with systems, digital, and packaging teams to meet performance goals.

Applicants should have a Bachelor’s degree in Electrical Engineering with 9+ years of CMOS design experience, and strong leadership and communication skills. This role requires U.S. citizenship and may involve security clearance.

Qualifications

• Bachelor’s degree in Electrical Engineering or related field with 9+ years of CMOS design experience, or Master’s with 7+ years, or PhD with 4+ years.
• Leadership in transistor-level CMOS RF/mixed-signal design through multiple full design cycles.
• Deep understanding of analog/RF design, including stability, noise, and layout effects.

Responsibilities

• Lead the design, simulation, and verification of RF/mixed-signal CMOS blocks for space payloads.
• Define architectures and specifications with cross-functional teams.
• Drive pre- and post-layout analyses and optimize performance, power, and area.
• Provide technical direction to layout and junior engineers; ensure robust radiation-aware layout.

Skills

RF CMOS design

Mixed-signal design

SPICE simulation

Cadence tooling

Leadership

Communication

Education

Bachelor’s in Electrical Engineering

Tools

Cadence

SPICE

Job description

Northrop Grumman is seeking a Senior CMOS Design Engineer to lead RF and mixed-signal IC development for space payloads. You will collaborate with systems, digital, and packaging teams to meet performance goals.

Applicants should have a Bachelor’s degree in Electrical Engineering with 9+ years of CMOS design experience, and strong leadership and communication skills. This role requires U.S. citizenship and may involve security clearance.