Solutions Architect

Advanced Micro Devices; San Jose (CA); On-site; USD 100,000 - 130,000; Full time

Benefits offered by this job

Comprehensive benefits package

Job summary

Advanced Micro Devices is looking for a skilled engineer to design and develop hardware/software co-design solutions for FPGA-based acceleration in San Jose, CA. The role requires expertise in SystemVerilog and strong analytical skills. Ideal candidates will have a Bachelor's or Master's in computer or electrical engineering and hands-on FPGA experience. Join AMD's innovative team to tackle complex technical challenges and shape the future of computing. The position offers a collaborative environment with competitive benefits.

Qualifications

• Expert in SystemVerilog/Verilog, synchronous design, and timing closure for high-speed logic.
• Strong C/C++ skills for bare-metal or RTOS programming on ARM/RISC-V cores.
• Deep knowledge of PCIe, AXI, DDR, and Ethernet.

Responsibilities

• Participate in all phases of the product development cycle from architecture through implementation.
• Design, verify, and validate high-performance logic using SystemVerilog/Verilog.
• Develop firmware for on-chip ARM Cortex or RISC-V cores.

Skills

RTL Expertise

Firmware/Software

Protocols

Validation

Hands-on experience with FPGAs

Tools proficiency

Education

Bachelor's or Master's degree in computer engineering/Electrical Engineering

Tools

SystemVerilog

C/C++

Vivado

Vitis

Python

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

THE ROLE

Join our team to architect and develop cutting‑edge hardware/software co‑design solutions for FPGA‑based acceleration across a wide range of applications—such as networking, storage, automotive, aerospace, and emerging AI/ML workloads. You will design high‑performance hardware acceleration engines and embedded software that orchestrates them, enabling next‑generation compute platforms.

THE PERSON

You are passionate about modern processor architecture, digital design, and system‑level validation. You thrive in collaborative environments, communicate effectively across global teams, and bring strong analytical and problem‑solving skills. You are eager to learn and tackle complex technical challenges.

KEY RESPONSIBILITIES

• Participate in all phases of the product development cycle from new product exploration, architecture through implementation, prototyping, validation, productization and support including but not limited to architecture, design, and documentation for IPs.
• Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be developed.
• RTL Development: Design, verify, and validate high-performance logic using SystemVerilog/Verilog. Focus on the data and control path, implementing interfaces for PCIe (Gen 6/7), CXL, UAL, Ethernet, and DDR5/6.
• Embedded System Development: Develop firmware and low-level system software for the on‑chip ARM Cortex (APU/RPU) or RISC‑V soft cores. This includes managing inter‑processor communication (IPC), DMA orchestration, and secure boot.
• System Level Integration: Utilize the AMD (Xilinx) Vivado and Vitis ecosystems to integrate custom IP with the Network on Chip (NoC), memory and other subsystems.
• Pre-Si Verification: Perform pre-silicon verification and emulation to ensure functional correctness and performance.
• Post-Si Validation: Lead the “Bring‑up” process in the lab. Perform post‑silicon validation, debugging complex interactions between the embedded software, hard IPs and FPGA hardware fabric.

PREFERRED EXPERIENCE

• Hands‑on experience with FPGAs.
• RTL Expertise: Expert in SystemVerilog/Verilog, synchronous design, and timing closure for high‑speed logic.
• Firmware/Software: Strong C/C++ skills for bare‑metal or RTOS programming on ARM/RISC‑V cores. Linux kernel‑mode driver development experience is a strong plus.
• Protocols: Deep knowledge of PCIe, AXI, DDR, and Ethernet. Familiarity with CXL or UAL is highly desirable.
• Verification: Familiarity with UVM‑based verification frameworks and emulation platforms (Palladium, Protium, Zebu).
• Validation: Proficiency with ILAs, high‑speed oscilloscopes, and protocol analyzers for hardware debugging.
• Tools: Proficiency in Python, Tcl, Makefiles, and shell scripting for automation.

ACADEMIC CREDENTIALS

• Bachelors or Masters degree in computer engineering/Electrical Engineering.

LOCATION

• San Jose, CA OR Longmont, CO.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee‑based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third‑party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.