Software Engineer

University of Oklahoma; Norman (OK); Presencial; USD 85.000 - 110.000; Jornada completa

Descripción de la vacante

The ARRC at UNIVERSITY OF OKLAHOM is seeking an experienced software engineer to join the FPGA team responsible for FPGA firmware development. The role focuses on enabling reliable radar data processing from user-defined scans, with a required bachelor’s degree in engineering and at least 36 months in embedded software development and optimization.

Responsibilities include translating algorithms into HDL designs, optimizing for performance and FPGA constraints, building HDL testbenches, timing

Formación

• Bachelor's degree in an engineering discipline.
• 36 months of embedded software experience or related software development and optimization work.
• Equivalency: 48 months of related experience may substitute for the degree.

Responsabilidades

• Translate complex algorithms into scalable digital designs and implement with HDL (Verilog, SystemVerilog).
• Optimize designs to balance throughput, latency, and FPGA resources.
• Design and develop testbenches to validate HDL modules and ensure data flows reliably across FPGA devices.
• Perform timing analysis and create constraints or implement pipelining to meet timing.
• May lead a functional team.
• Carry out additional duties to fulfill the role and responsibilities.

Conocimientos

HDL design

Verilog

SystemVerilog

Educación

Bachelor's degree in engineering

Descripción del empleo

Pay Range: Commensurate with experience

Benefits Eligible: Yes

Work Schedule: Monday – Friday, 8:00 a.m. to 5:00 p.m.

Travel: May be required

For Best Consideration Date: 08/10/2026

Position Introduction:

The Advanced Radar Research Center (ARRC) is seeking experienced technical software engineers. This position serves as a Software Engineer on the FPGA team. This team is responsible for the development of FPGA firmware to enable reliable production, conditioning, reduction, and transfer of radar data based on user-defined scan parameters.

A qualified candidate should have a Bachelor's in an engineering discipline and at least 36 months of software development and optimization experience.

This position will be expected to:

• Translate complex algorithms and operations into scalable digital designs and implement with high-quality HDL (Verilog, SystemVerilog).
• Ability to optimize designs to meet constraints by managing trade-offs between throughput, latency, and FPGA resources.
• Design and develop testbenches that thoroughly test HDL modules to ensure correctness and robustness to ensure data will reliably flow through a complex network of FPGA devices.
• Carry out timing analysis on designs and create constraints or implement pipelining to ensure compiled bitstreams reliably meet timing.
• May lead a functional team.
• Performs various duties as needed to successfully fulfill the functions of the position.
• This position requires the ability to obtain and maintain federal security clearance.

Required Education and Experience:

• Bachelor's degree.
• 36 months of embedded software experience.

Equivalency/Substitution: Will accept 48 months of related experience in lieu of the Bachelor's degree for a total of 84 months of related experience.

Hiring Contingent Upon a Background Check: Yes