SoC Verification Lead

Nvidia Corporation; Santa Clara (CA); On-site; USD 232,000 - 368,000; Full time

Benefits offered by this job

Equity

Benefits

Job summary

Nvidia Corporation is looking for a SoC Verification Engineer to manage SoC-level verification while driving clarity in complex environments. This role requires over 15 years of experience with ASIC/SoC verification and expertise in SystemVerilog and UVM. The successful candidate will own verification plans, collaborate with cross-functional teams, and manage risks.

The expected base salary ranges between $232,000 and $368,000, along with equity and benefits. NVIDIA values diversity and is an equal opportunity employer.

Qualifications

• 15+ years of hands-on experience in ASIC/SoC functional verification.
• Deep understanding of SoC-level verification challenges and verification flows.
• Consistent track record to lead verification efforts across teams.

Responsibilities

• Own the SoC-level verification plan and schedule.
• Collaborate with cross-functional teams to ensure verification requirements are met.
• Drive verification status reviews and mitigate risks throughout the project lifecycle.

Skills

ASIC/SoC functional verification

SystemVerilog

UVM-based testbench development

C/C++

Project risk identification

Time-management

Education

Bachelor's or Master's degree in Electrical Engineering or related field

Tools

EDA tools

Job description

NVIDIA is seeking an outstanding SoC Verification Engineer to serve as a Person-in-Charge (PIC) within the SoC Verification (SoCV) team. You will play a central role in verifying the most sophisticated AI-enabled SoC designs in the world. These chips power data center AI infrastructure, AI client computing platforms, autonomous vehicles, and robotics. This is a high‑impact role combining deep technical expertise and multi‑functional project leadership. It is ideal for someone who thrives on driving clarity in complex, fast‑paced environments.

What You’ll Be Doing

• Own the SoC‑level verification plan, schedule, and achievement tracking from the conception of the project through tape‑out, serving as the primary PIC across all verification workstreams.
• Collaborate with architects, IP owners, emulation team, FPGA team, and infrastructure engineers to align on coverage goals, resolve bottlenecks, and ensure verification requirements are met at every project stage.
• Drive verification status reviews, track open issues across teams, and proactively bring up risks to project leadership with clear mitigation plans.
• Lead risk identification and mitigation planning throughout the verification lifecycle, maintaining clear communication with collaborators.
• Partner with tape‑out teams to define and close verification sign‑off criteria at each tape‑out achievement.
• Define and continuously evolve SoC verification flows and methodologies to meet the demands of next‑generation AI‑enabled chip complexity.

What We Need to See

• Bachelor's degree or Master's degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field.
• 15+ years of hands‑on experience in ASIC/SoC functional verification.
• Deep understanding of SoC‑level verification challenges and flows – from block integration through full‑chip simulation and tape‑out sign‑off.
• Consistent track record to lead or coordinate verification efforts across multiple IPs, multi‑functional teams, and across the globe.
• Outstanding time‑management skills – able to prioritize effectively across parallel workstreams under schedule pressure.
• Demonstrated experience with project risk identification, tracking, and mitigation.
• Proficiency in SystemVerilog and UVM‑based testbench development; familiarity with C/C++ for directed and hardware‑controlled test development at the SoC level.
• Solid grasp of verification infrastructure: EDA tool configuration, regression automation, job farm management, and environment maintenance.

Ways to Stand Out from the Crowd

• Experience owning or contributing to verification sign‑off at SoC tape‑out achievements.
• Prior track record as a verification PIC or tech lead across a full SoC project lifecycle, from spec to silicon bring‑up.
• Familiarity with coverage closure methodologies – functional, code, and assertion‑based.

Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 232,000 USD - 368,000 USD.

You will also be eligible for equity and benefits.

Applications for this job will be accepted at least until June 14, 2026.

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.

NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.