SoC Validation Engineer — System Workloads & Debugging

Apple Inc.; Austin (TX); On-site; USD 110,000 - 160,000; Full time

Job summary

Apple Inc. in Austin, TX, is seeking a hardware validation engineer to join a team validating Apple SoCs with system workloads. You will define validation plans, execute tests across PVT corners, and triage issues while working with PE to optimize operation voltages and testing environments.

Applicants should have a BS or MS in Electrical or Computer Engineering and experience with SoC bring up, debugging, and scripting in Python, Perl or TCL.

Qualifications

• BS or MS in Electrical Engineering or Computer Engineering required.
• Experience with SoC bring up is preferred.
• Strong debugging skills and knowledge of computer architectures.
• Experience with Python, Perl or TCL scripting is desirable.

Responsibilities

• Validate Apple SoCs with system workloads.
• Define validation plans for IP blocks within Apple SoCs.
• Execute system tests using scripts/automation framework across PVT corners.
• Triage issues, perform root-cause analysis and propose workarounds.
• Interface with downstream testing teams to resolve environment issues.

Skills

SoC bring up

Debugging

Computer architecture knowledge

Python scripting

Education

BS or MS in Electrical Engineering or Computer Engineering

Tools

Python

Perl

TCL

Job description

Apple Inc. in Austin, TX, is seeking a hardware validation engineer to join a team validating Apple SoCs with system workloads. You will define validation plans, execute tests across PVT corners, and triage issues while working with PE to optimize operation voltages and testing environments.

Applicants should have a BS or MS in Electrical or Computer Engineering and experience with SoC bring up, debugging, and scripting in Python, Perl or TCL.