SoC Physical Design Engineer

Apple; Cupertino (CA); On-site; USD 200,000 - 250,000; Full time

Job summary

An established industry player is seeking a SoC Physical Design Engineer to join their innovative team. This role is pivotal in the hardware development process, focusing on the physical implementation of complex designs. You will work closely with various teams to ensure that design goals are met and that the highest standards of quality are maintained. If you are passionate about technology and eager to contribute to groundbreaking projects, this opportunity offers a dynamic environment where your skills will be valued and your contributions will make a significant impact.

Benefits

Stock options

Medical coverage

Dental coverage

Retirement plans

Educational reimbursement

Employee discounts

Qualifications

• Bachelor's degree in computer architecture, VLSI, or related fields.
• Experience with physical design tools and techniques is preferred.

Responsibilities

• Collaborate with teams to influence physical design early in the process.
• Complete netlist to GDS2 implementation for assigned partitions.

Skills

Verilog

VHDL

Python

Perl

TCL

SPICE

Teamwork

Education

Bachelor's degree in computer architecture

Master's or PhD degree in a relevant field

Tools

Synopsys

Cadence

Mentor Graphics

Job description

Apple is a multinational technology company that designs, develops, and sells consumer electronics, computer software, and online services. It is known for its innovative products, such as the iPhone, iPad, Mac, and Apple Watch, as well as its software, including macOS, iOS, iPadOS, watchOS, and tvOS. Apple is committed to delivering extraordinary products, services, and customer experiences, and its employees are passionate about innovation and leaving the world better than they found it.

Job Description: SoC Physical Design Engineer, PnR

This role is central to Apple’s hardware development, focusing on the physical implementation of design partitions (from netlist to tapeout) for a complex System on a Chip (SoC) using innovative process technology. You will collaborate closely with architecture, CAD, timing, and logic design teams to deliver top-tier designs.

Responsibilities:

1. Collaborate with the logic design team to understand partition architecture and influence physical design early in the process.
2. Complete netlist to GDS2 implementation for assigned partitions, ensuring schedule and design goals are met.
3. Perform timing, physical, and electrical verification and facilitate signoff closure for the partitions.
4. Identify and resolve design and flow issues related to physical design, proposing solutions and driving execution.

Required Qualifications:

1. Bachelor’s degree in computer architecture, VLSI, design, logic design, or circuit design.
2. Internship, project work, or relevant coursework in related fields.
3. Strong teamwork skills with the ability to collaborate across multiple teams.
4. Experience with Verilog, VHDL, Python, Perl, TCL, and/or SPICE is advantageous.

Preferred Qualifications:

1. Master’s or PhD degree in a relevant field.
2. Experience with physical design tools such as Synopsys, Cadence, or Mentor Graphics.
3. Knowledge of advanced physical design techniques like power optimization, timing closure, and DFM.

Compensation and Benefits:

Apple offers a competitive package including base pay, stock options, medical and dental coverage, retirement plans, discounts, and educational reimbursement. The pay range is $55.82 to $84.09/hr, depending on experience and location. Bonuses, commissions, and relocation support may also be available.

Equal Opportunity Employer:

Apple values diversity and inclusion, providing equal employment opportunities regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other protected characteristics.