SoC Architecture - IP Power

QUALCOMM, Inc.; San Diego (CA); On-site; USD 146,000 - 218,000; Full time

Job summary

Qualcomm Technologies, Inc. is seeking a senior ASIC infrastructure engineer to join the Infrastructure IP Team in San Diego. You will partner with HW designers to gather power estimates for SOC Infra IPs, analyze data, and identify bugs and optimization opportunities.

The role requires strong ASIC design and computer architecture knowledge, coordination with domain leads, and understanding of end-to-end silicon HW flows to deliver robust deployments aligned with product requirements.

Qualifications

• Bachelor's degree in Science, Engineering, or related field with 4+ years ASIC design/verification/validation/integration experience.
• Master's degree in Science, Engineering, or related field with 3+ years ASIC design/architecture/verification experience.
• PhD in Science, Engineering, or related field with 2+ years ASIC design/verification/validation/integration experience.

Responsibilities

• Gather power estimates for SOC infra HW IPs and analyze the data.
• Identify architectural and micro-architectural bugs/limitations and propose fixes.
• Coordinate with domain leads to ensure robust infrastructure deployment plans.

Skills

Power estimation

ASIC design

System architecture

Interconnect knowledge

SOC IP knowledge

Automation scripting

Communication skills

Adaptability

Education

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Job description

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

The infrastructure IP Team consists of a multi-disciplinary group involved in the definition and design of Platform infrastructure HW components such as Interconnect (NOC), System Cache, Memory controllers and System MMU that are implemented in all Qualcomm SoCs. This position primarily involves working with HW designer to gather power estimation of SOC Infra HW IPs, analyze the data, identify architectural and micro-architectural bugs/limitations and propose fixes and/or optimizations for the same. The ideal candidate should have a strong background in ASIC design and computer architecture while demonstrating good system level design/architecture understanding. The candidate will be required to co-ordinate with domain leads to ensure a robust infrastructure deployment plan based on product requirements. It requires understanding of HW architecture, HW-&-SW feature trade-off, and the complete silicon HW end-2-end design flow.

Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 7+ years of ASIC design, verification, or related work experience.
• Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, architecture, or related work experience.

Skills / Experience:

• Robust understanding of computer architecture
• Experience in system power architecture/design as well as exposure to power estimation flows.
• Basic understanding of end-end ASIC design flows
• Knowledge in SOC and Infrastructure IP (NOC, SMMU, Caches) HW architecture
• Exposure to some form of interconnect protocol
• Exposure to programming language for automation
• Ability to quickly react and adapt to changes
• Excellent communication skills

Preferred Qualification:

• Exposure to Quality of Service, Clocks, Power management, Security and Debug architectures and their respective software interfaces
• Good knowledge in industry standard Interconnect Protocol and IO Devices Protocol
• Understanding of HW-SW interfaces and firmware
• Experience in post-silicon flows and debugs

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
• Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
• PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Equal Opportunity Employment:

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Pay range and Other Compensation & Benefits:

$145,600.00 - $218,400.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.

Compliance and Security:

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.