SiGe HBT Device Modelling Intern (Summer 2027)

GlobalFoundries inc.; Essex Junction (VT); On-site; USD 28,000 - 55,000; Full time

Benefits offered by this job

Mentorship program

Networking with executives

Professional development opportunities

Job summary

GlobalFoundries is offering an internship in device modelling to collaborate with an RF device modelling team. You will develop compact models (HiCUM L2 V3.0) for SiGe HBT devices, extract parameters, and validate against measurements.

Mentorship, growth opportunities, and network access with executives are provided. Ideal candidates are 2nd-year graduate students pursuing a Master’s or PhD in Electrical Engineering or Microelectronics, with a strong GPA and English proficiency.

Qualifications

• Second-year graduate student actively pursuing a Master’s or PhD in Electrical Engineering, Microelectronics or related field.
• Overall GPA 3.5 or higher and in good academic standing.
• Ability to work 20–40 hours per week during internship.

Responsibilities

• Analyze measurement data for DC and RF characteristics.
• Develop HiCUM L2 V3.0 based compact model for HBT devices.
• Extract compact model parameters for advanced device physics.
• Develop procedures to incorporate new physical effects in the compact model and propose new models.
• Present results to the technical team after project completion.

Skills

English proficiency

Data analysis

Python/ Matlab/ R

Project management

Education

Master’s or PhD in Electrical Engineering/Microelectronics

Tools

Cadence Spectre

Cadence Virtuoso

ADS

Job description

About GlobalFoundriesGlobalFoundries (GF) is a leading manufacturer of essential semiconductors, enabling AI at scale from the cloud to the physical world. Through deep partnerships with customers, GF delivers differentiated, power‑efficient and high‑performance solutions for high‑growth markets. With global manufacturing operations across the U.S., Europe and Asia, GF is a trusted and holistic technology partner for customers around the world. GF’s talented, global team remains focused every day on security, longevity and sustainability. For more information, visit www.gf.com .Internship Program Overview:Our Interns & Co-ops are our entry-level talent pipeline for GF across the globe. Our goal is to provide students with a meaningful work experience that will equip them with the skills to embark on a career in the fast-paced and growing semiconductor industry after graduation. As an intern at GF, you’ll experience one-on-one mentorship, work assignments that prioritize your growth and potential, professional development opportunities, and the chance to network with executives.Summary of Role:In this position, the device modelling intern will collaborate with an RF device modeling team to develop device modeling capabilities for advanced semiconductor SiGe HBT devices. The responsibilities include applying device physics principles, characterizing devices using DC/RF methods, and utilizing the advanced HiCUM L2 V3.0 industry standard model to create compact models for RF applications. Additionally, modeling effects such as avalanche at high current densities and non-quasistatic phenomena will be compared with measurement data.Essential Responsibilities include:Analyze measurement data for DC and RF characteristics.Develop HiCUM L2 V3.0 based compact model for HBT device.Extract compact model parameters for advanced device physics.Develop a procedure to incorporate new physical effects in the compact model and propose new models/modeling methods if applicable.Presentation to technical team after the project completion.Other Responsibilities:Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs.Required Qualifications:Education – At least a second-year graduate student at time of application and actively pursuing a Master’s, or PhD in Electrical Engineering, Microelectronics or related field through an accredited degree program during the time of internship.Must have at least an overall 3.5 GPA and be in good academic standing.Language Fluency - English (Written & Verbal)Ability to work at least 20 to 40 hours per week during the internship.Preferred Qualifications:Prior related internship or co-op experienceDemonstrated prior leadership experience in the workplace, school projects, competitions, etc.Project management skills, i.e., the ability to innovate and execute on solutions that matter; the ability to navigate ambiguity.Strong written and verbal communication skillsStrong planning & organizational skillsSemiconductor device physics / characterization knowledgeFamiliarity of Device Compact modelsFamiliarity with industry standard compact model: High Current Model (HiCUM)Familiarity with design simulation tools such as Cadence Spectre or Keysight ADSFamiliarity with Design Layout using the Cadence Virtuosa, ADS or other design toolsData analysis and problem solvingKnowledge with shell scripting, multi-paradigm (Matlab/R) and high-level programming languages (Python/Perl/Lisp)#InternshipProgramUSExpected Salary Range$20.00 - $40.00Expected Salary Range$0.00 - $0.00The exact Salary will be determined based on qualifications, experience and location.If you need a reasonable accommodation for any part of the employment process, please contact us by email at [e-mail] and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law