Server IO Specialist. Sr. Director of Technology

Qualcomm; Santa Clara (CA); On-site; USD 284,900 - 427,300; Full time

Job summary

Qualcomm is seeking a highly experienced Server IO specialist to architect and design end‑to‑end Server IO solutions, including PCIe, CXL, and emerging technologies for datacenter SoCs.

The role involves collaboration with chip architects, IP design, performance and verification teams to optimize high‑performance, low‑power IO subsystems and to document IO architecture requirements. You will drive architectural decisions and ensure alignment with customer technical requirements.

Qualifications

• Bachelor’s degree with 10+ years of relevant experience in IO architecture.
• Master’s degree with 9+ years of relevant experience.
• PhD with 8+ years of relevant experience.
• Over 15 years of experience architecting PCIe, CXL, or similar IO technologies.
• Strong expertise in IOMMU / SMMU architecture and micro‑architecture.
• In‑depth understanding of fully coherent and IO coherent protocol flows.
• Experience with IO hardware stacks from Transport Layer to Physical Layer.

Responsibilities

• Work with chip architects to understand architecture concepts and high‑level requirements.
• Define and document IO architecture requirements and solutions for the chip.
• Collaborate with IP design and performance teams to optimize end‑to‑end IO solutions for PPA trade‑offs.
• Evangelize and communicate IO solutions to silicon, system, and software stakeholders.
• Develop architectural solutions meeting customer technical requirements for new products.
• Coordinate with design and verification teams to ensure implementation follows specifications.

Skills

IO architecture

PCIe

CXL

ARM ISA

SMMU

GIC

TDISP/IDE/TSP IO

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Master’s degree in related field

PhD in related field

Job description

Overview

Qualcomm is seeking a highly experienced Server IO specialist to architect and design end-to-end Server IO solutions, including PCIe, CXL, and emerging technologies such as UAL. This role involves collaboration with chip architects, IP design, performance, and verification teams to optimize high-performance, low‑power IO subsystems for datacenter SoCs.

Key Responsibilities

• Work with chip architects to understand architecture concepts and high‑level requirements.
• Define and document IO architecture requirements and solutions for the chip.
• Collaborate with IP design and performance teams to optimize the end‑to‑end solution for PPA trade‑offs.
• Evangelize and communicate solutions to silicon, system, and software stakeholders.
• Participate in new product development, comprehend customer technical requirements, and develop architectural solutions to meet those requirements.
• Work with design and verification teams to ensure implementation follows specifications.

Qualifications

Minimum Qualifications:

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 10+ years of relevant engineering experience.
• Master’s degree in related field and 9+ years of relevant experience.
• PhD in related field and 8+ years of relevant experience.

Preferred Qualifications:

• Over 15 years of experience architecting PCIe, CXL, or similar IO technologies.
• Strong expertise in IOMMU / SMMU architecture and micro‑architecture.
• In‑depth understanding of fully coherent and IO coherent protocol flows.
• Detailed knowledge of multiprocessor system architecture, memory and IO subsystems, high‑speed interconnects, operating systems/hypervisors, and platform firmware.
• Master’s in Computer Science/Engineering, Electrical Engineering, or related field.
• 12+ years in developing IO architecture for high‑speed IO such as PCIe Gen5‑7, CXL 2.0‑3.0.
• Expertise in performance micro‑architecture of the IO datapath between host and devices.
• Expertise in confidential compute technologies like TDISP, IDE, and TSP for IO interfaces.
• Experience architecting multi‑socket links such as UPI, C2C, or Infinity fabrics.
• End‑to‑end experience with the IO hardware stack from Transport Layer to Physical Layer.
• Experience with ARM ISA and related specifications such as SMMU, CHI, GIC.
• Familiarity with accelerator technologies like UAL and NVLink is a plus.

Compensation and Benefits

Base salary range: $284,900.00 – $427,300.00. The total compensation package includes a competitive annual discretionary bonus program and annual RSU grants. Qualcomm offers a comprehensive benefits package designed to support success at work, at home, and in play.

Equal Opportunity

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, Qualcomm will provide a reasonable accessible process. Qualifying employees may provide a request for accommodations to disability‑[e-mail]. Qualcomm is also committed to making its workplace accessible for individuals with disabilities. Eligibility for employment is not affected by race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.